SOYO Super 7 SY-5SSM User's Manual & Technical Reference page 52

BIOS Setup Utility
CHIPSET FEATURES SETUP (Continued)
CHIPSET
FEATURES
Linear Mode
SRAM Support
ECC Function
Support
AGP Aperture
Size
System BIOS
Cacheable
Video BIOS
Cacheable
Setting Description
Select Enabled if your
Disable
system contains a CPU that
Enable
requires linear mode (e.g.,
Cyrix M1/M2 CPU).
Disabled Enable/Disable the ECC
(error-correcting code)
Enabled
function support.
64MB Select the size of the
4 MB, 8MB, Accelerated Graphics Port
16 MB, (AGP) aperture. The
32 MB, 128 aperture is a portion of the
MB, 256 PCI memory address range
MB dedicated for graphics
memory address space.
Host cycles that hit the
aperture range are
forwarded to the AGP
without any translation.
Disabled
Enabled The ROM area F0000H-
FFFFFH is cacheable.
Disabled
Enabled The video BIOS C0000H-
C7FFFH is cacheable.
49
SY-5SSM
Note
Default
Default
Default
Default
Default