Asus Z97-WS User Manual page 102

DRAM DATA REF Voltage on CHA/CHB [Auto]
This item allows you to set the DRAM reference voltage on the data lines on Channels A and
B. You can use the <+> or <-> keys to adjust the value. The values range from 0.39500x to
0.63000x with a 0.00500x interval.
To set a value for the DRAM reference voltage, we recommend you to set a value close to
the standard value which is 0.500000x.
Clock Crossing VBoot [Auto]
This item allows you to increase the value of the clock crossing voltage boot when the rising
edge of the BCLK DN is equal to the falling edge of the BCLK D+. You can use the <+> or
<-> keys to adjust the value. The values range from 0.1 V to 1.9 V with a 0.00625 V interval.
Clock Crossing Reset Voltage [Auto]
This item allows you to increase the value of the clock crossing reset voltage when the rising
edge of the BCLK DN is equal to the falling edge of the BCLK D+. You can use the <+> or
<-> keys to adjust the value. The values range from 0.1 V to 1.9 V with a 0.00625 V interval.
Clock Crossing Voltage [Auto]
This item allows you to increase the value of the clock crossing voltage when the rising edge
of the BCLK DN is equal to the falling edge of the BCLK D+. You can use the <+> or <-> keys
to adjust the value. The values range from 0.1 V to 1.9 V with a 0.00625 V interval.
PLL Termination Voltage [Auto]
This item allows you to terminate the PLL Voltage. You can use the <+> or <-> keys to adjust
the value. The values range from 1.00000V to 2.50000 V with a 0.01250 V interval.
CPU Spread Spectrum [Auto]
This item allows you to enhance the BCLK overclocking capability or reduce the EMI
(electromagnetic disturbance) generated by the BCLK. Set this item to [Enabled] for EMI
reduction, or set this item to [Disabled] to enhance BCLK overclocking.
Configuration options: [Auto] [Disabled] [Enabled]
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Chapter 3: BIOS setup