Using The Ths7002 Evm; Using The Ths7002 Evm; Ths7002 Evm Jumper Settings; Ths7002 Evm Dip Switch Settings - Texas Instruments THS7002 User Manual

Programmable-gain amplifier evaluation module
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Using the THS7002 EVM

1.6 Using the THS7002 EVM

The THS7002 EVM operates from a split power supply with voltages ranging
from 5 V to 15 V. It also uses 5 volt logic control signals to configure the
operation of the EVM when the DIP switches are used. The use of a single
supply for this EVM is not recommended. As shipped, the preamplifiers are set
to a gain of 2 and the EVM is configured for a single-ended input that uses the
preamplifiers to directly drive the PGA stages. An oscilloscope is typically used
to view and analyze the EVM output signals.
1) Ensure that all power supplies are set to OFF before making power supply
2) Select the operating voltage for the EVM and connect appropriate split
3) Connect a 5-V power supply to the banana jack marked +5 V (J4).
4) Connect all power supply grounds to the banana jack marked GND (J2).
5) Connect an oscilloscope probe to the PGA–A amplifier output BNC (J9).
6) Set EVM jumpers as shown in Table 1–3.
Table 1–3. THS7002 EVM Jumper Settings
7) Set DIP switch 1 and 2 elements as shown in Table 1–4.
Table 1–4. THS7002 EVM DIP Switch Settings
SWITCH S1
LABEL
S1:A
A–G0
S1:B
A–G1
S1:C
A–G2
S1:D
A–S/D
S1:E
A–VREF
S1:F
VL
8) Set the power supplies to ON .
9) Connect a signal input to the INPUT A BNC (J6).
Note that each input connector on this EVM is terminated with a 50- resistor
to ground. With a 50- source impedance, the voltage seen by the THS7002
amplifier IC on the EVM will be
input connector.
10) Verify the output signal on the oscilloscope using a high-impedance probe
1-12
connections to the THS7002 EVM.
power supplies to the banana jacks on the module marked +V
–V
(J3).
CC
Connecting directly to J9 with a 50- nominal impedance cable and probe
is not recommended. The output drive capability of the PGAs is very
limited. Such a connection will load the output excessively, reducing the
output voltage range of the amplifier and is not a true measurement of the
amplifier performance.
JP1
JP2
2–3
2–3
POSITION
SWITCH S2
0
0
1
0
1
1
— a voltage gain of approximately 2.5 to 1 should be observed.
JP3
JP4
1–2
2–3
LABEL
S2:A
B–G2
S2:B
B–G1
S2:C
B–G0
S2:D
B–S/D
S2:E
B–VREF
S2:F
VH
the source signal voltage applied to the EVM
General Information
(J1) and
CC
JP5
1–2
POSITION
1
0
0
0
1
1

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