512K Pipelined Burst Cache Configuration; Multi I/O Port Addresses - SOYO 82430 HX / P54C User's Manual & Technical Reference

Pentium 82430 hx / p54c pci mainboard
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Hardware Setup
Upgrade to 512KB/Onboard 512KB Pipelined Burst Cache Configuration
1. Insert Jumper into JP31 when you have 512K Pipelined Burst SRAM
CHIPs onboard or 256K SRAM CHIPs and 256K Pipelined Burst
SRAM module.
2. Due to the various design, contact the supplier for 256KB Pipelined
Burst SRAM module when you want to upgrade to 512K cache on
your motherboard.
Figure 2Ð3Ð2. 512K Pipelined Burst Cache Configuration

Multi I/O Port Addresses

Default settings for multi-I/O port addresses are shown in the table
below.
Port
LPT1*
COM1
COM2
* If default I/O port addresses conflict with other I/O cards (e.g. sound
cards or I/O cards), you must adjust one of the I/O addresses to avoid
address conflict. (You can adjust these I/O addresses from the BIOS.
Note: Some sound cards have a default IRQ setting for IRQ7, which may
conflict with printing functions. If this occurs do not use sound
card functions at the same time you print.
586
CPU
Family
I/O Address
378H
3F8H
2F8H
JP31
IRQ
7
ECP + EPP
4
3
17
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