System Block Diagram - Supero SUPERSERVER 5017P-TLN4F User Manual

S S
UPER ERVER 5017P-TLN4F/TF User's Manual
Note: This is a general block diagram. Please see Chapter 5 for details.
PCIe x16 SLOT
2x SATA PORTS
4x SATA PORTS
4x USB3.0 by Header
x2 TWO PORT HEADERs
2X Stacked 2 port rear I/O
FLASH SPI
SPI 64Mb
Debug Header
TPM
Figure 1-1. Intel QM77 Chipset:

System Block Diagram

PCIe3.0_x16
8.0GT/s
SVID
IMVP 7
SATA 6Gb/s
SATA[1:0]
SATA 3Gb/s
SATA[5:2]
USB3.0
USB[3:0]
USB2.0
USB[13:4]
SPI
LPC
LPC
COM1 (rear I/O)
COM2 (internal header)
NCT6776F
LPC I/O
P/S2
DDR3 (CHA)
1333/1067 MHz
DDR3 (CHB)
1333/1067 MHz
PCIe1.0_x1
PCIE[0]
2.5GT/s
PCIe1.0_x1
PCIE[1]
2.5GT/s
PCIe1.0_x1
PCIE[2]
2.5GT/s
PCIe1.0_x1
PCIE[3]
2.5GT/s
PCIe1.0_x1
PCIE[4]
2.5GT/s
RGB
for non-IPMI SKU
1-4
ECC-SODIMM1
ECC-SODIMM2
GLAN1
RJ45
82574L
GLAN2
RJ45
82574L
GLAN3
RJ45
82574L
GLAN4
RJ45
82574L
IDT
PEB383
PCI
NCSI
PHY Dedicated Lan
for IPMI SKU
VGA