Advanced Chipset Features - Abit UL8 User Manual

BIOS Setup

3-4. Advanced Chipset Features

Phoenix – Award WorkstationBIOS CMOS Setup Utility
► DRAM Configuration
► M1689 Configuration
► AGP Configuration
► HyperTransport Config
Init Display First
↑↓:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values
# DRAM Configuration:
Click <Enter> key to enter its submenu:
Phoenix – Award WorkstationBIOS CMOS Setup Utility
DRAM Timing Selectable
X - DRAM Clock
X - CAS latency Time
X - Row Cycle Time
X - Row Refresh Cycle Time
X - RAS# to CAS# delay
X - RAS# to RAS# delay
X - Min RAS# Active time
X - RAS# Precharge Time
X - Write Recovery Time
X - Write to Read Delay
X - Read to Write Delay
X - DRAM Command rate
X - Burst Length
X - Bank Interleaving
32 bit Dram Memory Hole
MTRR mapping mode
↑↓:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values
DRAM Timing Selectable:
This item selects the DRAM timing mode. When set to "By SPD", the BIOS will read the DRAM module
SPD data and automatically set to the values stored in it. Leave this item to its default "Auto" setting.
! DRAM Clock:
This item sets the DRAM clock of your DRAM module. The system may be unstable or unable to boot up
if your DRAM module does not support the clock you set.
Advanced Chipset Features
Press Enter
Press Enter
Press Enter
Press Enter
PCI Slot
F6: Fail-Safe Defaults
DRAM Configuration
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
4 beats
Enabled
Auto
Continuous
F6: Fail-Safe Defaults
Item Help
F7: Optimized Defaults
Item Help
F7: Optimized Defaults
User's Manual
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