Intel BX80619I73960X Datasheet page 6

6-7 DMI2 to Port 0 Signals........................................................................................44
6-8 PECI Signals .....................................................................................................44
6-9 System Reference Clock (BCLK{0/1}) Signals........................................................44
6-10 JTAG and TAP Signals.........................................................................................45
6-11 SVID Signals .....................................................................................................45
6-12 Processor Asynchronous Sideband Signals.............................................................46
6-13 Miscellaneous Signals .........................................................................................47
6-14 Power and Ground Signals ..................................................................................48
7-1 Power and Ground Lands ....................................................................................51
7-2 SVID Address Usage ..........................................................................................54
7-3 Voltage Identification Definition ...........................................................................55
7-4 Signal Description Buffer Types ...........................................................................56
7-5 Signal Groups ...................................................................................................57
7-6 Signals with On-Die Termination ..........................................................................59
7-7 Power-On Configuration Option Lands...................................................................59
7-8 Processor Absolute Minimum and Maximum Ratings ...............................................60
7-9 Voltage Specification ..........................................................................................61
7-10 Current (Icc_Max and Icc_TDC) Specification.........................................................62
7-11 V Overshoot Specifications ...............................................................................63
CC
7-12 DDR3 Signal DC Specifications.............................................................................64
7-13 PECI DC Specifications .......................................................................................65
7-14 System Reference Clock (BCLK{0/1}) DC Specifications..........................................66
7-15 SMBus DC Specifications.....................................................................................66
7-16 JTAG and TAP Signals DC Specifications ................................................................67
7-17 Serial VID Interface (SVID) DC Specifications ........................................................67
7-18 Processor Asynchronous Sideband DC Specifications...............................................68
7-19 Miscellaneous Signals DC Specifications ................................................................69
8-1 Land Name .......................................................................................................72
8-2 Land Number ....................................................................................................95
6 Datasheet, Volume 1