Fujitsu MPB3021AT Product Manual page 145

Table 5.12 Ultra DMA data burst timing requirements (2 of 2)
NAM MODE 0
E (in ns)
MIN MAX
t 20
IORDYZ
t 0
ZIORDY
t 20
ACK
t 50
SS
Notes:
1) t , t and t indicate sender -to-recipient or recipient-to-sender interlocks, that is, one agent (either
UI MLI LI
sender or recipient) is waiting for the other agent to respond with a signal before proceeding. t
an unlimited interlock, that has no maximum time value. t
defined minimum. t
LI
2) All timing parameters are measured at the connector of the device to which the parameter applies.
For example, the sender shall stop generating STROBE edges t
Both STROBE and DMARDY- timing measurements are taken at the connector of the sender.
3) All timing measurement switching points (low to high and high to low) are to be taken at 1.5 V.
5 - 80
MODE 1 MODE 2
(in ns) (in ns)
MIN MAX MIN
20
0 0
20 20
50 50
is a limited time-out, that has a defined maximum.
C141-E045-02EN
COMMENT
MAX
20 Pull-up time before allowing IORDY to
be released
Minimum time device shall wait before
driving IORDY
Setup and hold times for DMACK-
(before assertion or negation)
Time from STROBE edge to negation of
DMARQ or assertion of STOP (when
sender terminates a burst)
is a limited time-out that has a
MLI
after the negation of DMARDY-.
RFS
is
UI