Fujitsu MPB3021AT Product Manual page 11

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5.6.4.5 Device terminating an Ultra DMA data in burst ............................................................. 5 - 83
5.6.4.6 Host terminating an Ultra DMA data in burst................................................................. 5 - 84
5.6.4.7 Initiating an Ultra DMA data out burst........................................................................... 5 - 85
5.6.4.8 Sustained Ultra DMA data out burst............................................................................... 5 - 86
5.6.4.9 Device pausing an Ultra DMA data out burst................................................................. 5 - 87
5.6.4.10 Host terminating an Ultra DMA data out burst............................................................... 5 - 88
5.6.4.11 Device terminating an Ultra DMA data in burst ............................................................. 5 - 89
5.6.5
Power-on and reset ......................................................................................................... 5 - 90
CHAPTER 6
OPERATIONS................................................................................................ 6 - 1
6.1
Device Response to the Reset......................................................................................... 6 - 1
6.1.1
Response to power-on .................................................................................................... 6 - 2
6.1.2
Response to hardware reset ............................................................................................ 6 - 3
6.1.3
Response to software reset.............................................................................................. 6 - 4
6.1.4
Response to diagnostic command .................................................................................. 6 - 5
6.2
Address Translation........................................................................................................ 6 - 6
6.2.1
Default parameters.......................................................................................................... 6 - 6
6.2.2
Logical address............................................................................................................... 6 - 7
6.3
Power Save ..................................................................................................................... 6 - 8
6.3.1
Power save mode............................................................................................................ 6 - 8
6.3.2
Power commands ........................................................................................................... 6 - 10
6.4
Defect Management........................................................................................................ 6 - 10
6.4.1
Spare area ....................................................................................................................... 6 - 11
6.4.2
Alternating defective sectors .......................................................................................... 6 - 11
6.5
Read-Ahead Cache ......................................................................................................... 6 - 13
6.5.1
Data buffer configuration ............................................................................................... 6 - 13
6.5.2
Caching operation........................................................................................................... 6 - 14
6.5.3
Usage of read segment.................................................................................................... 6 - 15
6.6
Write Cache.................................................................................................................... 6 - 22
x
C141-E045-02EN

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