Clock Control - AMD ATHLON 8 Datasheet

AMD Athlon™ XP Processor Model 8 Data Sheet
4.3

Clock Control

18
Preliminary Information
The processor implements a Clock Control (CLK_Ctl) MSR
(address C001_001Bh) that determines the internal clock
divisor when the AMD Athlon system bus is disconnected.
Refer to the AMD Athlon™ and AMD Duron™ Processors BIOS,
Software, and Debug Developers Guide, order# 21656, for more
details on the CLK_Ctl register.
Power Management
25175H—March 2003
Chapter 4