AMD ATHLON 8 Datasheet page 103

Amd computer hardware user manual
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25175H—March 2003
Appendix B - Conventions and Abbreviations
Preliminary Information
Table 32. Acronyms (continued)
Abbreviation
IDE
Integrated Device Electronics
ISA
Industry Standard Architecture
IPC
JEDEC
Joint Electron Device Engineering Council
JTAG
LAN
LRU
LVTTL
Low Voltage Transistor Transistor Logic
MSB
MTRR
Memory Type and Range Registers
MUX
NMI
OD
OPGA
PA
PBGA
PCI
Peripheral Component Interconnect
PDE
PDT
PGA
PLL
PMSM
Power Management State Machine
POS
POST
PP
RAM
ROM
RXA
SCSI
Small Computer System Interface
SDI
SDRAM
Synchronous Direct Random Access Memory
SIMD
Single Instruction Multiple Data
SIP
SMbus
AMD Athlon™ XP Processor Model 8 Data Sheet
Meaning
Instructions Per Cycle
Joint Test Action Group
Large Area Network
Least-Recently Used
Most Significant Bit
Multiplexer
Non-Maskable Interrupt
Open-Drain
Organic Pin Grid Array
Physical Address
Plastic Ball Grid Array
Page Directory Entry
Page Directory Table
Pin Grid Array
Phase Locked Loop
Power-On Suspend
Power-On Self-Test
Push-Pull
Random Access Memory
Read Only Memory
Read Acknowledge Queue
System DRAM Interface
Serial Initialization Packet
System Management Bus
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