Circuit Diagram - LG KE970 Service Manual

7. CIRCUIT DIAGRAM

1 2
A 1V5_CORE
C109 C110 C111
1u 0.1u 10n
B
VCXO_EN
R102
22K
VSUPPLY
U17
BATT_TEMP M0
W17
RF_TEMP M1
W16
JACK_TYPE M2
R104
F W15
M7 M
390K
R103 3.3K V16
M8
V17
R105 F I_MONITOR M9
W18
100K REMOTE_ADC M10
L12
PAOUT1A
M11
PAOUT1B
K12 BB
PAOUT2A
J12
PA_LEVEL PAOUT2B
C N15
QX BB_QX
P15
Q BB_Q
R13 BB
I BB_I
R14
IX BB_IX
B17
TXON_PA T_OUT0
B16
VIBRATOR_EN T_OUT1
B15
PA_BAND T_OUT2
D13
ANT_SW1 T_OUT3
B14
ANT_SW2 T_OUT4
C18
T_OUT5
D15
MODE T_OUT6 DIGC1~2
D14
KP_OUT(4) T_OUT7
A18
JACK_DETECT T_OUT8
C14
LCD_BACKLIGHT T_OUT9
A16
LCD_ID T_OUT10
TP107 C13
T_OUT11
D17
AF_PWR_EN T_OUT12
C15
AFC AFC
D C17
RF_EN RF_STR0
A17
TF_DETECT RF_STR1 DIGC1~2
B18
RF_CLK RF_CLK
C16
RF_DA RF_DATA
H1
SLIDE_OPEN CLKOUT0 EBU
U12
26MHZ_MCLK F26M PLL
K19
VCXO_EN VCXO_EN DIGA
L18
SIM_IO CC_IO
SIM
J16
SIM_CLK CC_CLK
M19
SIM_RST CC_RST
C12
TF_DAT0 MMCI_DAT0
D12
TF_DAT1 MMCI_DAT1
B12
TF_DAT2 MMCI_DAT2
A12 MMC
TF_DAT3 MMCI_DAT3
E12
TF_CMD MMCI_CMD
E C11
TF_CLK MMCI_CLK
B2
SPK_RCV_SEL IRDA_RX
A2 DIGD
RPWRON IRDA_TX
U11
USB_DP USB_DPLUS
V11 USB
USB_DM USB_DMINUS
E17
TDO TDO
D19
TDI TDI
F16
TMS TMS DIGC2
E16
TCK TCK
C19
_TRST TRST_N
D18
RTCK RTCK
E14
TRIG_IN TRIG_IN DIGC2
TP115 B13
MON1 MON1 DIGC1
TP116 A14
MON2 MON2 DIGC1
U8
TRACESYNC TRACESYNC
V8
TRACECLK TRACECLK
F
T9
PIPESTAT0 PIPESTAT0
U9
PIPESTAT1 PIPESTAT1
W8
PIPESTAT2 PIPESTAT2
R9
TRACEPKT0
TRACEPKT(0) W9 ETM
TRACEPKT1
TRACEPKT(1) T10
TRACEPKT2
TRACEPKT(2) V9
TRACEPKT3
TRACEPKT(3) U10
TRACEPKT4
TRACEPKT(4) V10
TRACEPKT5
R10
TRACEPKT(5)
TRACEPKT6
T11
TRACEPKT(6)
TRACEPKT7
TRACEPKT(7)
DIGD
TRACEPKT(0:7)
G
DIF_D(0:7)
UART
3G 2.5G
1
GND
GND
2
RX RX RXD_0
3
TX TX TXD_0
4
UFLS NC1
5
ON_SW ON_SW RPWRON_EN
6
VBAT VBAT VSUPPLY
H
7
PWR
NC2
8
OJ101 OJ102 OJ103 OJ104
URXD NC3
9
UTXD NC4
10
DSR DSR
11
RTS RTS_0
12
CTS CTS_0
1 2
3 4 5
1V5_CORE 1V5_DSP 1V8_MEM 1V8_MEM 2V72_IO 1V8_MEM 2V72_IO 2V85_CARD
C101 C102 C103
0.1u 0.1u 0.1u
C119 C120 C121 C122 C123 C124
1u 0.1u 10n 0.1u 0.1u 0.1u
C112 C113 C114 C115
1u 0.1u 10n 0.1u C116 C117 C118
1u 0.1u 10n
Do not assemble CN101, It is only for debugging purpose
BASE BAND PROCESSOR
U103
PMB8876
DIGB DIGA
DIGD VBR
R121
0
2V72_IO
C137 C138
22n 22n
R122 1K
CIF_D(0:7)
C139 C140
R123 1K
15p 15p
L101 L102 L103 L104
270nH 270nH 100nH 100nH
3 4 5
6 7 8
2V85_SIM 2V11_RTC 1V5_DSP 3V1_USB
R101
4.7
C104 C105 C106 C107 C108
0.1u 0.1u 0.1u 0.1u 0.1u
A(0:24)
H2 TP101 A(0)
EBU_A0
H3 A(1)
EBU_A1
J4 A(2)
EBU_A2
J2 A(3)
EBU_A3
J3 A(4)
EBU_A4
K1 A(5)
EBU_A5
K2 A(6)
EBU_A6
K3 A(7)
EBU_A7
K5 A(8)
EBU_A8
L2 A(9)
EBU_A9
L1 A(10)
EBU_A10
M1 A(11)
EBU_A11
N1 A(12)
EBU_A12
K4 A(13)
EBU_A13
L4 A(14)
EBU_A14
P1 A(15)
EBU_A15
A(16)
L3
EBU_A16
R1 A(17)
EBU_A17
N2 A(18)
EBU_A18
N4 A(19)
EBU_A19
N5 A(20)
EBU_A20
T1 A(21)
EBU_A21
R2 A(22)
EBU_A22
U2
A(23)
EBU_A23
V2 A(24)
EBU_A24 D(0:15)
V4 TP104 D(0)
EBU_AD0
R4 D(1)
EBU_AD1
W3 D(2)
EBU_AD2
T5 D(3)
EBU_AD3
R6 D(4)
EBU_AD4
U5 D(5)
EBU_AD5
W4 D(6)
EBU_AD6
W5 D(7)
EBU_AD7
U6 D(8)
EBU_AD8
V5 D(9)
EBU_AD9
D(10)
V6
EBU_AD10
D(11)
W6
EBU_AD11
T8 D(12)
EBU_AD12
U7 D(13)
EBU_AD13
V7 D(14)
EBU_AD14
R7 D(15)
EBU_AD15
P4
EBU_CS0_N _FLASH1_CS
V1 TP113 1V8_MEM
EBU_CS1_N _RAM_CS
T2
EBU_CS2_N _FLASH2_CS
P3
EBU_CS3_N
G2 TP114
FCDP_RB_N FCDP
T7
R116
EBU_ADV_N _ADV
N3 3.3K
EBU_RD_N _RD
U1
EBU_WR_N _WR
T6
EBU_WAIT_N _WAIT
M2
EBU_RAS_N _RAS
M4
EBU_CAS_N _CAS
M3
EBU_BC0_N _BC0
P2
EBU_BC1_N _BC1
U3 R117 24
EBU_SDCLKO SDCLKO
U4
EBU_SDCLK1 SDCLKI
R3 R118 24
EBU_BFCLKO BFCLKO
V3
EBU_BFCLKI BFCLKI
T3
EBU_CKE CKE
V12
RTC_OUT RTC_OUT
U13
RTC F32K
V13
OSC32K
X101
U14 32.768KHz
RTC RESET_N _RESET
P16 2 1
VREFN
L17 C131 220n
VREFP C132 C133
M16 R119 22K
IREF 15p 15p
M15
VDDBB
L15
VSSBB
U18
VDDVBR_1
R17 2V65_ANA
VDDVBR_2
T17
VSSVBR_1
P17
VSSVBR_2
T15
VDDVBT
R16
VSSVBT
T14
VDDD
U16
VSSD
V14
VDDM
V15
VSSM
K17 C134 C135 C136
VDDBG
DIGD N19
DIGD DIGA VSSBG
N16 0.1u 0.1u 0.1u
AGND
DIGA K15
DIGD
GUARD
DIGD
(U18 U17 T15 : Voice)
6 7 8
- 117 -
9 10 11
INTEL MEMORY
NOR SDRAM DIE Maker P/N 1 2 3 4
EUSY0319301 512M 256M 1 PF38F5070M0Y0B0 NA 0 ohm NA NA
Sibley
EUSY0302101 1G 256M 2 PF38F5570MMY0B0 NA 0 ohm 0 ohm NA
PF38F6070M0Y0BE
EUSY0328701 1G 256M 1 0 ohm NA NA 0 ohm Capulet
A(0:24) U101 PF38F6070M0Y0BE D(0:15)
A(0) D1 M2 D(0)
A0 DQ0
A(1) C1 L1 D(1)
A1 DQ1
A(2) B1 K1 D(2)
A2 DQ2
A(3) B2 L2 D(3)
A3 DQ3
A(4) A2 M4 D(4)
A4 DQ4
A(5) B3 L3 D(5)
A5 DQ5
A(6) A3 L4 D(6)
A6 DQ6
A(7) A4 L5 D(7)
A7 DQ7
A(8) G8 M5 D(8)
A8 DQ8
A(9) F8 L6 D(9)
A9 DQ9
A(10) E8 M6 D(10)
A10 DQ10
A(11) G9 L7 D(11)
A11 DQ11
A(12) F9 L8 D(12)
A12 DQ12
A(13) E9 K9 D(13)
A13 DQ13
A(14) D9 L9 D(14)
A14 DQ14
A(15) C9 M8 D(15)
A15 DQ15
A(16)
B9
A16 _1G_CS
1
A(17) B4 D5 R106 0 TP102
A17 _ADV _ADV
A(18) B5 G3
A18 F1__CE 2 _FLASH1_CS
A(19) A5 G2 R107 NA
A19 F2__CE 3 _FLASH2_CS
A(20) F7 H3 R108 NA
A20 F3__CE
A(21) E7 E6
A21 F4__CE_A27 BFCLKI
A(22) B7 K5 R109 24
A22 F_CLK BFCLKO
A6 J5
A(23)
A23 D_CLK SDCLKO
1V8_MEM A(24) A7 H5
A24 D__CLK SDCLKI
A8 H7 R110 24
_FLASH1_CS A25 _OE _RD
4
R111 0 B8 G7 TP103
A26 F__RST _RESET
J9 R112 10K
F_WAIT _WAIT
J1 E2 1V8_MEM
F_VPP _WE _WR
H6 TP105
D__WE
D4 E1
F1_VCC1 F__WP1
C125 C126
J4 F1 R113 1K
F1_VCC2 F__WP2 $V
0.1u 0.1u
D6 B6 R114 1K
F2_VCC1 F_DPD F_DPD
J6 E5 TP106
F2_VCC2 N_CLE
D8
N_ALE R115
C5
D_VCC1 100K
D3 H1
D_VCC2 N_RY__BY
D7
D_VCC3
G6
D_CKE CKE
C127 C128
D2 G4 TP108
A(13)
0.1u 0.1u S_VCC D_BA0
H4 TP109
A(14)
D_BA1
J2 F4 TP110
VCCQ1 D__RAS _RAS
J3 F3
TP111
VCCQ2 D__CAS _CAS
J7 F2 TP112
VCCQ3 D1__CS _RAM_CS
J8 E3
VCCQ4 D2__CS
H9
D_DM0_S__LB _BC0
C2 H8
VSS1 D_DM1_S__UB _BC1
C129 C130
C3 M7
0.1u 0.1u VSS2 D_UDQS
C4 M3
VSS3 D_LDQS
C6 F6
VSS4 N__RE_S__CS1
C7 H2
VSS5 N__WE_S_CS2
C8
VSS6
K2
VSS7
K3 A1
VSS8 DU1
K4 A9
VSS9 DU2
K6 M1
VSS10 DU3
K7 M9
VSS11 DU4
K8 G1
VSS12 RFU
1V8_MEM
U102 A2 SN74AUC1G08YZPR
A1
_FLASH1_CS VCC
C2
_1G_CS
B1
_FLASH2_CS
GND
C1
ON BOARD ARM9 JTAG & ETM INTERFACE
2V72_IO 1V8_MEM
CN101
G1 G2
1 30
TRACEPKT(0:7)
2 29
TRACECLK
3 28
TRACEPKT(7)
4 27
_TRST TRACEPKT(6)
5 26
TDI TRACEPKT(5)
6 25
TMS TRACEPKT(4)
7 24
TCK TRACEPKT(3)
8 23
TRACEPKT(2)
RTCK
9 22
TRACEPKT(1)
TDO
10 21
TRACEPKT(0)
_EXTRST
11 20
TRIG_IN PIPESTAT2
12 19
TRIG_OUT PIPESTAT1
13 18
PIPESTAT0
14 17
TRACESYNC
15 16
G3 G4
Engineer:
LG Electronics
Drawn by: G.C.LIM
R&D CHK:
B.Y.YANG TITLE:
KE/ME970 MAIN
DOC CTRL CHK:
(Infineon S-GOLD2)
MFG ENGR CHK:
Changed by: Date Changed: Time Changed: QA CHK: REV: 1.2 Drawing Number:
mentor 2006-10-25
9 10 11
12
A
B
C
D
E
F
G
H
Size:
A3
12 1 8 A
Page:
1/4
12