Chipset Configuration Submenu - Intel D845EPI Specification

Intel Desktop Board D845EPI Technical Product Specification

4.4.9 Chipset Configuration Submenu

To access this menu, select Advanced on the menu bar and then Chipset Configuration.
Maintenance
The submenu represented in Table 55 is for configuring chipset options.
Table 55.

Chipset Configuration Submenu

Feature
ISA Enable Bit
PCI Latency Timer
Extended Configuration
SDRAM Frequency
88
Main
Advanced
PCI Configuration
Boot Configuration
Peripheral Configuration
IDE Configuration
Diskette Configuration
Event Log Configuration
Video Configuration
USB Configuration
Chipset Configuration
Options
• Disabled (default)
• Enabled
• 32 (default)
• 64
• 96
• 128
• 160
• 192
• 224
• 248
• Default (default)
• User Defined
• Auto (default)
• 200 MHz
• 266 MHz
• 333 MHz
Security Power
Description
When set to Enable, a PCI-to-PCI bridge will only
recognize I/O addresses that do not alias to an ISA
range (within the bridge's assigned I/O range).
Allows you to control the time (in PCI bus clock
cycles) that an agent on the PC bus can hold the bus
when another agent has requested the bus.
Allows the setting of extended configuration options.
Allows override of detected memory frequency value.
NOTE: If SDRAM Frequency is changed, you must
reboot for the change to take effect. Also, after
changing this setting and rebooting, the System
Memory Speed parameter in the Main menu will
reflect the new value
Boot Exit
continued