IBM NetVista User Manual page 106

94
User Guide
Table 3. DMA I/O address map (continued)
Address (hex) Description
0083 Channel 1, page table address register
0087 Channel 0, page table address register
0089 Channel 6, page table address register
008A Channel 7, page table address register
008B Channel 5, page table address register
008F Channel 4, page table address/refresh
register
00C0 Channel 4, memory address register
00C2 Channel 4, transfer count register
00C4 Channel 5, memory address register
00C6 Channel 5, transfer count register
00C8 Channel 6, memory address register
00CA Channel 6, transfer count register
00CC Channel 7, memory address register
00CE Channel 7, transfer count register
00D0 Channels 4–7, read status/write command
register
00D2 Channels 4–7, write request register
00D4 Channels 4–7, write single mask register bit
00D6 Channels 4–7, mode register (write)
00D8 Channels 4–7, clear byte pointer (write)
00DA Channels 4–7, master clear (write)/temp
(read)
00DC Channels 4–7, clear mask register (write)
00DE Channels 4–7, write all mask register bits
00DF Channels 5–7, 8- or 16-bit mode select
Bits Byte pointer
00 – 07
00 – 07
00 – 07
00 – 07
00 – 07
00 – 07
00 – 15 Yes
00 – 15 Yes
00 – 15 Yes
00 – 15 Yes
00 – 15 Yes
00 – 15 Yes
00 – 15 Yes
00 – 15 Yes
00 – 07
00 – 02
00 – 02
00 – 07
N/A
00 – 07
00 – 03
00 – 03
00 – 07