Pci Interrupt Routing Map - Intel BOXD865GVHZ Technical Product Specification

Product specification
Table of Contents

Advertisement

Table 24.

PCI Interrupt Routing Map

PCI Interrupt Source
ICH5 USB UHCI controller 1 INTA
SMBus controller
ICH5 USB UHCI controller 2
AC '97 ICH5 Audio
ICH5 LAN
ICH5 USB UHCI controller 3
ICH5 USB UHCI controller 4 INTA
ICH5 USB 2.0 EHCI controller
PCI bus connector 1
PCI bus connector 2
PCI bus connector 3
Serial ATA
NOTE
In PIC mode, the ICH5 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 23 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
ICH5 PIRQ Signal Name
PIRQA
PIRQB
PIRQC
INTB
INTB
INTC
INTD
INTA
INTB
PIRQD
PIRQE
PIRQF
INTB
INTA
INTD
INTA
INTC
INTB
INTC
INTA
Technical Reference
PIRQG
PIRQH
INTD
INTB
INTC
INTA
INTD
59

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Boxd865gvhzlD865gvhz

Table of Contents