Pci Interrupt Routing Map - Intel YA810E Technical Product Specification

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Intel Desktop Board YA810E Technical Product Specification

2.7 PCI Interrupt Routing Map

This section describes interrupt sharing and how the interrupt signals are connected between the

onboard PCI devices. The PCI specification shows how interrupts can be shared between devices

attached to the PCI bus. In most cases, the small amount of latency added by interrupt sharing

does not affect the operation or throughput of the devices.

The ICH PCI-to-LPC bridge has four programmable interrupt request (PIRQ) input signals. All

PCI interrupt sources connect to one of these PIRQ signals. Because there are only four signals,

some PCI interrupt sources are mechanically tied together on the YA810E board and therefore

share the same interrupt.

Table 17 lists the PIRQ signals and shows how the signals are connected to the onboard PCI

interrupt sources.

Table 17.

PCI Interrupt Source

AGP Controller

ICH Audio Controller

ICH USB Controller

PCI LAN Controller

NOTE

The ICH can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 10, 11, 14,

and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt.

However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ

lines to be connected to the same IRQ signal.

ICH PIRQ Signal Name

PIRQA

PIRQB

INTA

INTB

PIRQC

PIRQD

INTD

INTA

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