Table of Contents
Advertisement
Tomcat i875PF S5105
POST (hex)
18h:
1Bh:
1Dh:
1Fh:
21h:
23h:
24h:
25h:
26h:
27h:
29h:
2Bh:
2Dh:
33h:
35h:
Description
Detect CPU information including brand, SMI type (Cyrix or Intel) and
CPU level (586 or 686).
Initial interrupts vector table. If no special specified, all H/W interrupts are
directed to SPURIOUS_INT_HDLR & S/W interrupts to
SPURIOUS_soft_HDLR.
Initial EARLY_PM_INIT switch.
Load keyboard matrix (notebook platform)
HPM initialization (notebook platform)
1. Check validity of RTC value:
e.g. a value of 5Ah is an invalid value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use
default value instead.
Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take
into consideration of the ESCD's legacy information.
Early PCI Initialization:
-Enumerate PCI bus number.
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it into C000:0
1. If Early_Init_Onboard_Generator is not defined Onboard clock
generator initialization. Disable respective clock resource to empty PCI
& DIMM slots.
2. Init onboard PWM
3. Init onboard H/W monitor devices
Initialize INT 09 buffer
1. Program CPU internal MTRR (P6 & PII) for 0-640K memory address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example: onboard
IDE controller.
4. Measure CPU speed.
Invoke Video BIOS
1. Initialize double-byte language font (Optional)
2. Put information on screen display, including Award title, CPU type,
CPU speed, full screen logo.
Reset keyboard if Early_Reset_KB is defined e.g. Winbond 977 series
Super I/O chips. See also POST 63h.
Test DMA Channel 0
http://www.tyan.com
Appendix II: Post Error Code for BIOS
70
Advertisement
Table of Contents
