Advanced Chipset Features - MSI MS-9249 User Manual

Advanced Chipset Features

NOTE
Change these settings only if you are familiar with the chipset.
DRAM Timing Selectable
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to By SPD enables DRAM timing to
be determined automatically by BIOS based on the configurations on the SPD.
Selecting Manual allows users to configure these fields manually.
CAS Latency Time
This controls the timing delay (in clock cycles) before SDRAM starts a read
command after receiving it. Settings: 2, 2.5, 3 (clocks). 2 (clocks) increases
the system performance the most while 3 (clocks) provides the most stable
performance.
Active to Precharge Delay
The field specifies the idle cycles before precharging an idle bank. Settings:
8, 7, 6, 5 (clocks).
BIOS Setup
3-15