Advanced Chipset Features
MSI Reminds You...
Change these settings only if you are familiar with the chipset.
DRAM Timing Selectable
This setting determines whether DRAM timing is configured by reading the
contents of the SPD (Serial Presence Detect) EPROM on the DRAM module.
Selecting By SPD makes the following settings automatically determined by
BIOS according to the configurations on the SPD. Setting options: By SPD,
Manual.
CAS Latency Time
This controls the timing delay (in clock cycles) before SDRAM starts a
read command after receiving it. Settings: 1.5, 2, 2.5, 3 (clocks). 1.5
(clocks) increases the system performance the most while 3 (clocks) pro-
vides the most stable performance.
Active to Precharge Delay
This setting controls the number of clock cycles for DRAM to be al-
lowed to precharge from the active state. Setting options: 7, 6, 5.
DRAM RAS# to CAS# Delay
When DRAM is refreshed, both rows and columns are addressed
BIOS Setup
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