Reference Input - Texas Instruments PGA849 User Manual

Hardware

2.5 Reference Input

The output voltage of the PGA849 is developed with respect to the voltage on reference pin REF. Use the REF
pin to offset the output signal to a precise voltage level. Typically, this offset is set to the mid-voltage level of
the output-stage supplies. To accomplish this level shift, a voltage source must be connected to the REF pin to
level-shift the output so that the PGA849 drives a single-supply ADC. For bipolar voltage output-stage supply
operation, the REF pin is typically connected to the low-impedance system ground.
The voltage source applied to the reference pin must provide a low output impedance. Any resistance at
the reference pin is in series with an internal 5kΩ resistor that creates an imbalance in the four resistors of
the internal difference amplifier. The PGA849EVM provides an optional reference buffer through the OPA192
op-amp (U2). This buffer provides a low-impedance path when driving the REF pin with external reference
sources.
Connector J2.1 of the EVM provides access for external reference sources. For best performance, use a
low-noise, low-drift, precision reference when driving the REF pin with an external source. To connect the buffer
to the external reference source, insert wires into each terminal of J2 and then tighten the screws to make the
connection.
To set the REF to the external reference, shunt jumper J1 4-3. In similar fashion, shunt jumper J1 1-2 to set
REF to GND. Alternatively, shunt jumper J1 5-6 to set the REF to mid-supply level of the output-stage supplies
through the R1-R2 voltage divider.
To bypass the buffer and access the REF pin directly, shunt jumper J17 2-3.
By default, the buffer drives the REF pin, and the reference is set to mid-supply level of the output stage
supplies. Jumper J17 is set to shunt pins 1-2, and Jumper J1 is set to shunt pins 5-6.
input connections and optional REF buffer.
Figure 2-5. PGA849EVM Reference Input and Optional Buffer
When using the optional REF buffer, the REF input signal must allow headroom above and below
the op-amp supplies. Use a reference input voltage in the range of (LVSS-) + 300mV < REF_ext <
(LVDD+) -300mV to remain within a good OPA192 output swing linear range. Exceeding the op-amp
linear range results in degraded linearity performance of the PGA849 circuit.
8 PGA849 Evaluation Module
LVDD+
PGA849
+
–
5 k

Gain Network
5 k
¨
–
+
A2 A1 A0 DGND LVSS
A A A
2 1 0
LVSS–
¦
LVDD+
R2
10 k
Connector
TP2
J1
REF_Ext
LVSS–
6 5
4 3
J2.1
REF
2 1
External
J2.2
REF Select
Jumper
Note
Copyright © 2024 Texas Instruments Incorporated
C3
100 nF
LVDD
DA_IN–
5 k
©
OUT
TP7
–
REF
+
REF
REF
J5.1
5 k
§
REF
TP7
DA_IN+ Connector
3
TP3
2
GND
R10
C17 1
22 nF 0
¥
C16 J17
100 nF
REF Buffer Bypass
Jumper
R15 2 k
¤
R14 0
¢
REF
LVDD+
C19
2200 pF
–
R3
1 k
¡
+
R12 20
£
U2
C1
OPA192
10 PF
LVSS–
Optional REF
Buffer
www.ti.com
Figure 2-5 shows the REF
SBOU315 – MARCH 2024
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