Analog Input Card; Overview; Input Buffer; Common Mode Performance - Lexicon 960L Service Manual

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Analog Input card

The Analog Input card consists of eight channels of A/D conversion and associated input circuitry (sheets 1-
4), bus interface fpga and connector (sheets 5,6) and on-board power conditioning (sheet 7). This card is
plugged into the IO backplane which is accessed from the rear of the 960L chassis. The following system
block diagram highlights its place within the 960L system.

Overview.

The Analog Input card is based on the AK5393 delta-sigma A/D converter, which accepts 2 channels of
analog input and produces a pair of 24-bit digital audio samples at nominal rates up to 96kHz. Four
converters provide the 8 channels of A/D conversion. High impedance differential inputs accept balanced or
unbalanced signals at +24dBu maximum level on XLR connectors. Additional circuitry supplies the
conditioning necessary to drive the differential 5Vp-p A/D input. The design supports nominal sample rates
of 44.1/48kHz in single-speed mode and 88.2/96kHz in double-speed mode.
The following detailed circuit description applies to channel 1 (sheet 1). The seven other channels are
similar.

Input Buffer

Signals at pins 2 and 3 of input XLR connector J2 are ac-coupled by C83 and C85 and attenuated by
voltage dividers R130/ R129 and R132/R131, respectively. Differential input impedance is >50kohms,
common mode impedance is >13kohm, and low-frequency response is <0.1dB down at 1Hz. Voltage
division by 2 (-6dB) reduces a +24dBu level on either XLR pin to a maximum of +18dBu (8.7Vpeak) at the
inputs of unity-gain buffers U20. The series resistances of R130, R132 prevent damage from excessive
current if the input is overdriven. The common-mode component out of U20 is sensed by U16, which scales
it by approximately -0.66. The output of U20 is also applied to the summing network formed by R49, 50,51
and 52, which scales it by approximately 0.4 and subtracts the common-mode component scaled by
approximately 0.6 x .66=0.4. The common-mode voltage is substantially removed, and only the differential-
mode component of the input signal appears at the input of unity-gain buffer U8, regardless of whether the
applied input is balanced or unbalanced. The dc voltage at the non-inverting input of U16 is set at 2.5Vdc
by R97,98 to create the offset that biases the A/D converter in the middle of its 5V range. Due to the gain of
the stage, the dc level at the output of U16 is (1+0.66) x 2.5V=4.15V, which then is scaled back down by
the summing network and appears at 2.5V at the inputs of U8. R81 supplies part of the dc current drawn by
the summing network, reducing the dc load on U16. With +24dBu balanced input, the voltage out of each
side of U20 is +/- 4.35Vpeak, the two sides have opposite phase, and there is no ac signal developed at the
output of U16. The resulting fullscale differential signal at U8 is 7Vp-p. If the input is single-ended, the
driven side of U20 develops +/- 8.7Vpeak, and U16 output swings between about 1.3 and 7 volts to balance
the differential input to U8, which is still 7Vp-p.
U8 drives the differential A/D converter input through a low-impedance attenuating RC filter network
consisting of R33, R26, R34, and C36. The network scales 7Vp-p signals down to 4.9Vp-p to match the
nominal fullscale input level of the converter, so digital fullscale corresponds to +24dBu at the input
connector. The single-pole 180kHz lowpass filter attenuates energy at the 128FS A/D sampling frequencies
by >55dB, while passband response is flat within 0.2dB to 40kHz.

Common Mode Performance

Good common-mode rejection requires well-matched gains at the two input buffers and on boths sides of
the summing/balancing network, where unequal common-mode gain on the two signal paths can convert a
common-mode signal to an apparent differential-mode signal. Precision 0.1% resistors are used as
appropriate to ensure that the minimum common-mode rejection ratio of the input circuitry is better than -
45dB. Other resistors affect differential gain, but not common-mode rejection, and 1% precision is sufficient.
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