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BIOS Setting
(tCL-tRCD-tRP-tRAS)
SO-DIMM#1
SO-DIMM#2
Size
BM-2503 SERIES USER MANUAL
Options
No changeable options
No changeable options
No changeable options
Chapter 5 BIOS Setup
Description/Purpose
and latency.
• CAS Latency (tCL) - This is the most
important memory timing. CAS stands
for Column Address Strobe. If a row
has already been selected, it tells us
how many clock cycles we'll have to
wait for a result (after sending a
column address to the RAM
controller).
• Row Address (RAS) to Column
Address (CAS) Delay (tRCD) - Once
we send the memory controller a row
address, we'll have to wait this many
cycles before accessing one of the
row's columns. So, if a row hasn't been
selected, this means we'll have to wait
tRCD + tCL cycles to get our result
from the RAM.
• Row Precharge Time (tRP) - If we
already have a row selected, we'll have
to wait this number of cycles before
selecting a different row. This means it
will take tRP + tRCD + tCL cycles to
access the data in a different row.
• Row Active Time (tRAS) - This is the
minimum number of cycles that a row
has to be active for to ensure we'll
have enough time to access the
information that's in it. This usually
needs to be greater than or equal to the
sum of the previous three latencies
(tRAS = tCL + tRCD + tRP).
Displays if SO-DIMM#1 socket is
populated/enabled or not.
Displays if SO-DIMM#2 socket is
populated/enabled or not.
Displays the total memory size.
Page: 5-26
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