Capturing Isolated Addresses; Configuring For State-Per-Clock Mode - HP E2465A PowerPC 604 PGA User Manual

Preprocessor interface
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Capturing Isolated Addresses
Analyzing the PowerPC 604
Trigger Menu
The loose coupling of the address and data buses on the PowerPC 604 makes
it more difficult to trace only activities associated with a given address, such
as writes to a variable. Depending on how deep the pipeline is, an address of
interest may be followed by up to eight data beats before the data associated
with the address appears on the bus. One technique to trace writes to a
variable is shown below. (The data cache is off or in write-through mode.)
( 100/500MHz LA D) ( Trigger 1 )
(c1rnce 1) (
Run
)
State Sequence Levels
Timer (
Arming
1 2
Hhile storing "no state"
Control
8
TRIGGER on "VAR"
1 time
ecquisi tionJ
Control
0
Hhile storing "¢idle"
- -
Then find
"TA"
8 times
(
Count
Else on "VAR" go to level
2
States
0
Store "no state"
--(
Modify
On "VAR" go to 1 evel
2
Trigger
(+Label+) ( ADDR
) ( AACK
)(TA
) ( acks
)
(
DATA
)(
DATA_B )
(•Terms+) (
Hex
)(
Hex
)(
Hex )(Binary)(
Hex
)(
Hex
)
(
AACK
) ( xxxxxxxx) (
0
)(
x )( ox xx ) ( xxxxxxxx) ( xxxxxxxx)
(
id 1 e
) ( xxxxxxxx) (
1
)(
1
) (
1111
) ( xxxxxxxx) ( xxxxxxxx)
(
TA
) ( xxxxxxxx) ( x
)(
0
)( xx ox ) ( xxxxxxxx) ( xxxxxxxx)
(
VAR
) ( 0016500B) (
0
) (
x )( ox xx ) ( xxxxxxxx ) ( xxxxxxxx)
Configuring for State-per-clock mode
To configure the analyzer to store wait and idle states, change the storage
qualification from
11
+' =
idle
11
to
11
anystate
11 •
Doing so
will
capture
all
states
(state-per-clock).
E2465A PowerPC 604 PGA Preprocessor
2-13
J

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