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T-SGPIO Headers
Two T-SGPIO (Serial-Link General Pur-
pose Input/Output) headers are located
at J14 and J15 on the motherboard.
These headers are used to commu-
nicate with the Seriel-Link System
Monitoring chip on the backplane. See
the table on the right for pin defi nitions.
Refer to the board layout below for the
locations of the headers.
2
Power SMB (I
C) Connector
2
Power SMB (I
C) Connector (J6) moni-
tors the status of the power supply, fan
and system temperature. See the table
on the right for pin defi nitions.
FAN6
FAN5
JPW1
JPW3
DIMM1A
DIMM1B
DIMM2A
DIMM2B
DIMM3A
DIMM3B
JPL2
LAN
CTRL
JPL1
LAN
CTRL
SLOT7 SIMLP IPMI
Audio CTRL
SLOT6 PCI-E X16
JC2
SLOT5 PCI 33MHz
CD1
SLOT4 PCI-E X4 (in X16 slot)
A
JI2C4
JI2C1
JPF
JI2C2
JI2C3
SLOT3 PCI 33MHz
S I/O
T-SGPIO1
SLOT2 PCI-X 133/100MHz
SLOT1 PCI-X 133/100MHz
FLOPPY
IDE1
Pin#
1
3
5
7
C
J6
J3P1
FAN7
DIMM1-1
DIMM0-1
DIMM1-2
CPU1
DIMM0-2
DIMM1-3
DIMM0-3
Intel
5100
MCH
CPU2
JBT1
I-button
Intel
ITE
ICH9R
CTRL
Battery
B
LES1
LES2
T-SGPIO2
JPS1
SAS
PXH-V
CTRL
BIOS
JP1
USB8
USB9
USB6/7
USB4/5
J5
JL1
JWOR1
2-21
Chapter 2: Installation
T-SGPIO1/2
Pin Defi nitions
Defi nition
Pin
NC
2
Ground
4
Load
6
Clock
8
Note: NC= No Connections
PWR SMB
Pin Defi nitions
Pin#
Defi nition
1
Clock
2
Data
3
PWR Fail
4
Ground
5
+3.3V
A. T_SGPIO1
JAR
JP3
JPW2
B. T_SGPIO2
LE1
C. Power SMB
JF1
SP1
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JWD1
Defi nition
NC
DATA Out
Ground
NC
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