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Schematic Diagrams
Processor 10/12
VCC_IN
D
Sheet 11 of 47
C
Processor 10/12
VCC_IN
C61
B
VCC_IN
C343
A
B - 12 Processor 10/12
5
4
U21M
36A
36A
VCORE SVID
36A
A24
G32
VCCIN_1
VCCIN_66
A26
H24
VCCIN_2
VCCIN_67
A29
H26
VCCIN_3
VCCIN_68
A30
H30
VCC_IN
A33
VCCIN_4
VCCIN_69
H32
c p
u
( T O P )
VCCIN_5
VCCIN_70
A35
J1
VCCIN_6
VCCIN_71
AY39
J2
VCCIN_7
VCCIN_72
B24
K1
B26
VCCIN_8
VCCIN_73
K2
C350
C340
C119
C69
C99
C338
C84
C342
VCCIN_9
VCCIN_74
B29
K24
VCCIN_10
VCCIN_75
+
B30
K26
VCCIN_11
VCCIN_76
B33
K30
B35
VCCIN_12
VCCIN_77
K32
VCCIN_13
VCCIN_78
BA10
L24
VCCIN_14
VCCIN_79
BA40
L26
VCCIN_15
VCCIN_80
BB39
L30
BB9
VCCIN_16
VCCIN_81
L32
VCCIN_17
VCCIN_82
BC10
N24
VCCIN_18
VCCIN_83
BC40
N26
VCCIN_19
VCCIN_84
BD39
N30
VCCIN_AUX
BD9
VCCIN_20
VCCIN_85
N32
VCCIN_21
VCCIN_86
BE10
P24
VCCIN_22
VCCIN_87
BE40
P26
VCCIN_23
VCCIN_88
BF9
P28
VCC_IN
PR27
BG10
VCCIN_24
VCCIN_89
P30
c p
u
( T O P )
*100_04
VCCIN_25
VCCIN_90
BG40
P32
VCCIN_26
VCCIN_91
BH12
T21
VCCIN_27
VCCIN_92
C65
C98
C64
C77
C92
C37
C19
C118
C76
BH39
T23
[35]
AUX_VCC_SENSE
BH9
VCCIN_28
VCCIN_93
T25
VCCIN_29
VCCIN_94
BJ10
T27
VCCIN_30
VCCIN_95
BJ40
T31
VCCIN_31
VCCIN_96
[35]
AUX_VSS_SENSE
BK39
U23
BL10
VCCIN_32
VCCIN_97
U27
VCCIN_33
VCCIN_98
BL40
U29
R75
VCCIN_34
VCCIN_99
BM39
U31
*100_1%_04
VCCIN_35
VCCIN_100
BN40
U33
BP12
VCCIN_36
VCCIN_101
V23
VCCIN_37
VCCIN_102
BP39
V25
VCCIN_38
VCCIN_103
BR10
V27
VCCIN_39
VCCIN_104
BR40
V29
VCC_IN
BT12
VCCIN_40
VCCIN_105
V31
VCCIN_41
VCCIN_106
BT39
V33
VCCIN_42
VCCIN_107
BU10
W22
VCCIN_43
VCCIN_108
BU40
W24
PR26
BV12
VCCIN_44
VCCIN_109
W28
100_04
VCCIN_45
VCCIN_110
BY12
W32
VCCIN_46
VCCIN_111
CA10
VCCIN_47
VCC_SENSE_R
CB12
R38
R18
*20mil_short_04
VCC_SENSE
D24
VCCIN_48
VCCIN_SENSE
R37
VSS_SENSE_R
R15
*20mil_short_04
VSS_SENSE
[38]
VCCIN_49
VSSIN_SENSE
D26
VCCIN_50
H_CPU_SVIDDAT_R
D29
M12
R22
*0201_short
VCCIN_51
VIDSOUT
H_CPU_SVIDCLK_R
H_CPU_SVIDDAT
[38]
D30
M11
R27
*0201_short
R16
H_CPU_SVIDCLK
[38]
D33
VCCIN_52
VIDSCK
P12
H_CPU_SVIDALRT#_R
R24
220_04
H_CPU_SVIDALRT#
[38]
100_1%_04
VCCIN_53
VIDALERT#
D35
VCCIN_54
E24
VCCIN_55
E26
R25
56_1%_04
VCCST
E27
VCCIN_56
OSCAR
07_24_2020
VCCIN_57
E29
R23
100_1%_04
VCCIN_58
E30
CAD Note: the PU resistors close to CPU
VCCIN_59
E32
E33
VCCIN_60
SVID Signals
VCCIN_61
G2
VCCIN_62
G24
VCCIN_63
G26
G30
VCCIN_64
VCCIN_65
TGL_U_IP_EXT
VCC_IN
VCC_IN
c p
u
( T O P )
c p
u
( T O P )
c p
u
C78
C45
C91
C87
C142
C18
C140
C24
C58
C130
C53
C44
C14
C51
C86
C105
C48
C93
C28
C88
C36
C13
C122
VCC_IN
VCC_IN
c p
u
( T O P )
c p
u
( T O P )
c p
u
( T O P )
C52
C25
C27
C39
C120
C73
C100
C102
C104
C21
C29
C57
C103
C121
C66
C355
C34
5
4
3
U21N
AB12
CY18
VCCIN_AUX_1
VCCPRIM_1P8_1
AC10
CY20
VCCIN_AUX_2
VCCPRIM_1P8_2
AE10
CY24
VCCIN_AUX_3
VCCPRIM_1P8_3
AK2
CY26
14A
AR10
VCCIN_AUX_4
VCCPRIM_1P8_4
DA18
VCCIN_AUX_5
VCCPRIM_1P8_5
AT12
DA20
VCCIN_AUX_6
VCCPRIM_1P8_6
AU10
DA22
VCCIN_AUX
VCCIN_AUX_7
VCCPRIM_1P8_7
AW10
DA24
BV1
VCCIN_AUX_8
VCCPRIM_1P8_8
DA26
VCCIN_AUX_9
VCCPRIM_1P8_9
BV39
DC18
VCCIN_AUX_10
VCCPRIM_1P8_10
BW40
DC20
VCCIN_AUX_11
VCCPRIM_1P8_11
BY39
DC22
CC1
VCCIN_AUX_12
VCCPRIM_1P8_12
DC24
VCCIN_AUX_13
VCCPRIM_1P8_13
CD12
DC26
VCCIN_AUX_14
VCCPRIM_1P8_14
CF10
DD20
VCCIN_AUX_15
VCCPRIM_1P8_15
CG12
DD22
CH10
VCCIN_AUX_16
VCCPRIM_1P8_16
DV22
VCCIN_AUX_17
VCCPRIM_1P8_17
CJ1
VCCIN_AUX_18
CJ12
DA35
VCCIN_AUX_19
VCCPRIM_3P3_1
CK10
DC28
CL12
VCCIN_AUX_20
VCCPRIM_3P3_2
DC30
VCCIN_AUX_21
VCCPRIM_3P3_3
CM10
DD30
VCCIN_AUX_22
VCCPRIM_3P3_4
CP1
VCCIN_AUX_23
CP10
DV34
CR12
VCCIN_AUX_24
DCPRTC
VCCIN_AUX_25
CT10
DV46
VCCIN_AUX_26
VCCLDOSTD_0P85
CU12
VCCIN_AUX_27
R70
*20mil_short_04
CY1
DV16
AK1
VCCIN_AUX_28
VCCA_CLKLDO_1P8_1
DC15
VCCIN_AUX_29
VCCA_CLKLDO_1P8_2
AUX_VSS_SENSE_R
R74
*20mil_short_04
AV9
DV28
AUX_VCC_SENSE_R
VCCIN_AUX_VSSSENSE
VCCDPHY_1P24
AT9
VCCIN_AUX_VCCSENSE
DD38
Sense Only
0.2A
VCCDSW_1P05
DD17
VNNEXT_1P05
VCC_VNNEXT_1P05_1
DD18
BR3
VCC_VNNEXT_1P05_2
VCC1P05_OUT_FET_1
BR4
Sense Only
0.2A
DA15
VCC1P05_OUT_FET_2
BT5
V1P05EXT
VCC_V1P05EXT_1P05_1
VCC1P05_OUT_FET_3
DA17
VCC_V1P05EXT_1P05_2
DA31
GPP_B2
VCCPRIM1P05_OUT_PCH_1
R109
0_04
DB39
DC33
[13]
VRALERT#_PD
DV12
GPP_B2/VRALERT#
VCCPRIM1P05_OUT_PCH_2
DC31
GPP_F22/VNN_CTRL
VCCPRIM1P05_OUT_PCH_3
DT12
GPP_F23/V1P05_CTRL
DC35
VCCIN_AUX_VID0
VCCRTC
DB37
DD37
[35]
VCCIN_AUX_VID0
VCCIN_AUX_VID1
DB38
GPP_B0/CORE_VID0
VCCDSW_3P3
DA28
[35]
VCCIN_AUX_VID1
GPP_B1/CORE_VID1
VCCPGPPR
D02 modify
20210702
CY31
VCCPRIM_3P3_5
R284
10K_1%_04
CY33
?
[38]
VCCPRIM_3P3_6
CV39
?
1.8VA
R283
10K_1%_04
VCCPRIM_1P8_18
R269
*100K_1%_04
AP12
RSVD_1
R276
*100K_1%_04
TGL_U_IP_EXT
VCCIN_AUX
VCCIN_AUX
c p
u
( T O P )
c p
u
( T O P )
( T O P )
C141
C17
C55
C367
C132
C156
C179
C157
C365
C361
C176
C155
C146
C67
C175
C59
C180
C178
VCCIN_AUX
c p
u
( T O P )
C128
C80
C79
C181
C135
C374
3
2
1
1.3A
1.8VA
1.8VA
C187
VDPHY_1P24
LDO_OUT_0P85
C414
C416
0.2A
3.3VA
VRTCEXT
VCCA_LDO_1P8
LDO_OUT_0P85
R197
0_06
1.8VA
C199
C190
VDPHY_1P24
VDSW_1P05
V1P05_OUT_FET
V1P05_OUT_PCH
PC H pi n DV16/DC15
R232
0_04
5mA
VDD3
VCCDSW_3P3
VCC_RTC
3mA
R240
*0_04
3.3VA
VPGPPR_3P3
R294
*0_04
1.8VA
0.2A
R118
0_04
3.3VA
3.3VA
1.3A
1.8VA
PLACE CAP CLOSEST POSSIBLE TO THE BGA
VRTCEXT
VCC_RTC
3.3VA
VDSW_1P05
C412
C189
C185
C186
C191
VCCIN_AUX
c p
u
( T O P )
C136
C158
C150
C54
C154
C376
C177
C167
C166
C358
Title
Title
Title
[11] TGL U -M,N
[11] TGL U -M,N
[11] TGL U -M,N
Size
Size
Size
Document
Document
Document
Number
Number
Number
6-71-NLx0MU-D02
6-71-NLx0MU-D02
6-71-NLx0MU-D02
Custom
Custom
Custom
NLx0MU
NLx0MU
NLx0MU
Date:
Date:
Date:
Wednesday, August 18, 2021
Wednesday, August 18, 2021
Wednesday, August 18, 2021
2
1
D
C
B
A
R e v
R e v
R e v
D02
D02
D02
Sheet
Sheet
Sheet
11
11
11
o f
o f
o f
47
47
47
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