Integrated Peripherals; Onboard Ide Function - JETWAY 845GVFC User Manual

If an insufficient number of cycles is allowed for the RAS to accumulate its charge before
DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast
gives faster performance; and Slow gives more stable performance. This field applies only
when synchronous DRAM is installed in the system. The settings are: 2T, 3T and 4T.

3-7 Integrated Peripherals

CMOS Setup Utility – Copyright(C) 1984-2003 Award Software
> Onboard IDE Function
> Onboard Device Function
> Onboard Super IO Function
USB2.0 Controller
Init Display First
Power On Function
KB Power On Password
Hot Key Power On
Power Loss Function
↑ ↓ → ←
Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit
F5:Previous Values

Onboard IDE Function

Please refer to section 3-7-1
Onboard Device Function
Please refer to section 3-7-2
Onboard Super IO Function
Please refer to section 3-7-3
Init Display First
This item allows you to decide to activate whether PCI Slot or AGP VGA first. The settings
are: PCI Slot, AGP Slot.
3-7-1 Onboard IDE Function
CMOS Setup Utility – Copyright(C) 1984-2003 Award Software
OnChip Primary PCI IDE
OnChip Secondary PCI IDE
Integrated Peripherals
Press Enter
Press Enter
Press Enter
Enabled
PCI Slot
Button Only
Enter
Ctrl-F1
Always Off
F6:Optimized Defaults
Onboard IDE Function
Enabled
Enabled
25
Item Help
Menu Level >
F1:General Help
F7:Standard Defaults
Item Help