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screw terminal (if the output voltage will be greater than 50 Vdc) on the EVM for the linear regulator
package you are testing. Connect the load between the output of the linear regulator and ground using
the correct outputs (banana connectors or screw terminals). Be sure not to exceed the load current
limit as described in the linear regulator data sheet.
6. Disable the 5-pin KVU package by connecting J32 pin 2 (EN_KVU5) to J32 pin 3 (GND_KVU5).
7. Disable the DDA package by connecting J13 pin 2 (EN_DDA) to J13 pin 3 (GND_DDA).
3
PCB Layout
Figure 1
to
Figure 5
SBVU065 – May 2020
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illustrate the PCB layouts for this EVM.
Figure 1. Assembly Layer
Figure 2. Top Layer Routing
Copyright © 2020, Texas Instruments Incorporated
MLTLDO2EVM-037 Evaluation Module
PCB Layout
13
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