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The NI 6583 ships with socketed CLIP options that you can use to add module I/O to the LabVIEW
project. The NI 6583 has the following compatible CLIP options:
•
NI 6583 Basic Channel CLIP—Provides read/write access to all single-ended lines on DDC A
and all differential lines on DDC B using a simple channel-based interface. Each I/O line has a
direction control signal. This CLIP provides a clock signal for export on each connector. The clock
input data from the NI 6583 is passed to LabVIEW FPGA for use in the FPGA VI. This CLIP also
allows for individual clock output inversion.
•
NI 6583 Basic Connector CLIP—Provides read/write access to all single-ended lines on DDC A
and all differential lines on DDC B. The individual data lines for DDC A are accessed using a U32
data type and the individual data lines on DDC B are accessed using a U16 data type in LabVIEW
FPGA. Each I/O line has a direction signal. This CLIP also allows for individual clock output
inversion.
•
NI 6583 DDR Connector CLIP—Provides read/write access to all single-ended lines on DDC A
and all differential lines on DDC B. The individual data lines for DDC A are accessed using a U32
data type and the individual data lines on DDC B are accessed using a U16 data type in LabVIEW
FPGA. Data from each edge of the clock is presented as "rising" and "falling." Each I/O line has a
direction control signal. This CLIP also allows for individual clock output inversion.
Caution
All CLIP options include intellectual property for voltage and direction control. The
voltage is controlled with a 10-bit DAC code or with an enumerated data type. You must use this
intellectual property to prevent damage to your NI 6583 and to your system.
Refer to the NI FlexRIO Help for more information about NI FlexRIO CLIP items, configuring the
NI 6583 with a socketed CLIP, and a list of available socketed CLIP signals.
NI 6583R User Guide and Specifications
24
ni.com
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