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Do not connect this jumper for normal operation.
The RESET pin connects to both CHIP_RESET jumper JP21 and push-button switch RESET1. Either
option can reset the device (including recalibrating the PLL).
Table 3
summarizes the RESET configuration options.
RESET (Pin 12)
7
Output Buffer Termination
This EVM supports proper termination for all three types of output buffers. To ensure that the chosen
output buffer works properly with the correct termination, select or place the proper components.
shows different ways to terminate the outputs of the device.
7.1
Output Buffer Examples
LVPECL Output Buffer: Use jumpers J24 and J26.
LVDS Output Buffer: Remove jumpers J24 and J26. Place a 100-Ω resistor at the R85 placeholder, if
necessary. If the output pair connects to an oscilloscope through 50-Ω SMA cables, then the oscilloscope
50-Ω to ground connection takes care of this termination, and the 100-Ω resistor is no longer necessary.
LVCMOS Output Buffer: This LVCMOS buffer typically has 30-Ω internal impedance. For a 50-Ω
impedance characteristic line, use an external 22-Ω series resistor. For an SMA connection to an
oscilloscope, connect the output as ac-coupled (using C52, C57, C71, and C74). A lower-than-expected
swing occurs because the LVCMOS driver is not capable of driving a 50-Ω to ground load.
7.2
Availability of Optional Output
An optional bypassed output (OSC_OUT) is only available if the user chooses the PLL output(s) at an
LVPECL signaling level. J219 is the SMA for this output.
SCAU048 – March 2012
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Table 3. Reset Configuration
Operating Mode
0
0 → 1
Clock generator calibration
1
Figure 4. EVM Output Termination Options
Copyright © 2012, Texas Instruments Incorporated
Device reset
Normal
CDCM9102EVM Clock Evaluation Module
Output Buffer Termination
Device Output
Hi-Z
Hi-Z
Active
Figure 4
5
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