Table of Contents
Advertisement
Features
1
Features
•
Easy-to-use evaluation module (EVM) to generate clock signals with low jitter and phase noise
•
Easy device setup
•
Control pins configurable through jumpers
•
Requires 3.3-V power supply
•
Single-ended or crystal input clock reference
•
Termination available for LVPECL, LVDS, and LVCMOS output clocks
spacer for space between last listitem and image
2
General Description
The CDCM9102 is a high-performance, low-phase-noise clock generator. The CDCM9102 has one crystal
and low-voltage CMOS (LVCMOS) input buffer and two universal outputs.
This device is a programmable clock generator with control pins only. No EEPROM or programming
interface is necessary to program these devices.
For optimum performance, the EVM has 50-Ω SMA connectors and well-controlled, 50-Ω-impedance
microstrip transmission lines.
For additional information about the CDCM9102 device, see the data sheet Low-Noise Two-Channel 100-
MHz Clock Generator (SCAS922).
2
CDCM9102EVM Clock Evaluation Module
Figure 1. CDCM9102EVM Evaluation Module
Copyright © 2012, Texas Instruments Incorporated
www.ti.com
SCAU048 – March 2012
Submit Documentation Feedback
Advertisement
Table of Contents
