AMD M56 Reference Manual page 98

Bus Interface Registers
RX TLP Header Register
Field Name
RX_TLP_HDR4
RX TLP Header Register
Field Name
RX_TLP_CRC
RX TLP CRC Register
Field Name
RX_DLP0
last received dlp
Field Name
RX_DLP1
last received dlp
Field Name
RX_DLP_CRC
last dlp crc
Field Name
RX_CREDITS_ALLOCATED_PH
RX_CREDITS_ALLOCATED_NPH
RX_CREDITS_ALLOCATED_CPLH
Field Name
RX_CREDITS_ALLOCATED_PD
M56 Register Reference Manual
2-92
PCIE_RX_TLP_HDR4 - R - 32 bits - PCIEIND:0x79
Bits Default
31:0
PCIE_RX_TLP_CRC - R - 32 bits - PCIEIND:0x7A
Bits Default
31:0
PCIE_RX_DLP0 - R - 32 bits - PCIEIND:0x7B
Bits Default
31:0
PCIE_RX_DLP1 - R - 32 bits - PCIEIND:0x7C
Bits Default
31:0
PCIE_RX_DLP_CRC - R - 32 bits - PCIEIND:0x7D
Bits Default
31:0
PCIE_RX_CREDITS_ALLOCATED - R - 32 bits - PCIEIND:0x7E
Bits Default
7:0
15:8
23:16
PCIE_RX_CREDITS_ALLOCATED_D - R - 32 bits - PCIEIND:0x7F
Bits Default
11:0
0x0 Hard-coded to zero
0x0 CRC value of the last received TLP
0x0 Debug register: last received dlp bit [31:0]
0x0 Debug register: last received dlp bit [47:32]
0x0 debug register: crc for the last received dlp
0x0 For posted TLP header, the number of FC units granted to transmitter
since initialization, modulo 256
0x0 For non-posted TLP header, the number of FC units granted to trans-
mitter since initialization, modulo 256
0x0 For completion TLP header, the number of FC units granted to trans-
mitter since initialization, modulo 256
0x0 For posted TLP data, the number of FC units granted to transmitter
since initialization, modulo 4096
© 2007 Advanced Micro Devices, Inc.
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