Clock Input Jumper Description - Texas Instruments ADS62P EVM Series User Manual

Circuit Description
Alternatively, the clock may be supplied by an onboard VCXO and CDCE72010 clock buffer. The
CDCE72010 Clock Buffer has been factory programmed to output a clock to the ADC that is 1/4 the rate
of the on-board VCXO. While using this clock option, a separate 20MHz reference clock must be supplied
to the CDCE72010 by way of the Clock Input SMA connector J19 (Surface jumper SJP4 should be
shorted to position 2-3 for this case). From the CDCE7201 two clocking options to the ADC are possible.
A differential LVPECL clock output may be connected to the ADC clock input or a single-ended CMOS
clock from the CDCE72010 may be routed to the ADC transformer-coupled clock input through an
on-board crystal filter. For better performance, selecting the CMOS clock through a crystal output is
recommended. Prior to making any jumper settings, see the schematic located at the end of this
document. Table 6
populated on the EVM by default, although the CDCE72010 Clock buffer is installed.
EVM Banana Jack
J18
J19
J14
J15
SJP4
SJP7
SJP6
JP21
SJP8
JP20
14 ADS62PXXEVM
displays the various clock option settings. The VCXO and crystal filter do not come
Table 6. Clock Input Jumper Description
Description
ENABLE VCXO TCO-2111
Clock Input
CDCE72010 power down
CDCE72010 Reset
Clock In or CDC reference Jumper
Clock input +ve terminal of T6 for ADC
clock
Clock input +ve terminal of T4 for ADC
clock
Mode select pin for CDCE72010
PLLLOCK LED
AUX_SEL pin for CDCE72010
Jumper Setting
1-2 → VCXO enabled
2-3 → VCXO disabled Default is no shunt
1-2 → CDCE72010 is power down
Open → CDCE72010 is on
1-2 → Reset
Open → Normal operation (Default)
1-2 → J19 supplies clock directly to ADC
2-3 → Reference clock for CDCE72010
1-2 → Connects J19 to ADC
3-4 → Connects Yo output of CDCE72010
(This path has crystal filter) to ADC
5-6 → Connects Y1P
(Differential LVPECL clock output of CDCE72010)
1-2 → Connects to ground (default)
2-3 → Connects to Y1N
(Differential clock output of CDCE72010) only to be used with
Y1P
1-2 → High (Default), see data sheet of CDCE72010 (SCAS858)
2-3 → Ground
1-2 → Connects to D3 diode
2-3 → Ground through 10nF capacitor
1-2 → High, see data sheet of CDCE72010
2-3 → Ground (Default)
SLAU237A – May 2008 – Revised April 2009
www.ti.com
Submit Documentation Feedback