Chapter 3
Advanced Chipset Features
Note: Change these settings only if you are familiar with the chipset.
DRAM Timing Setting
Press <Enter> to enter the sub-menu and the following screen appears:
Configure SDRAM Timing by SPD
This setting determines whether SDRAM timing is controlled by the SPD
(Serial Presence Detect) EEPROM on the DRAM module. Setting to Ena-
bled enables the following fields automatically to be determined by BIOS
based on the configurations on the SPD. Selecting Disabled allows users to
configure these fields manually.
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