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Register Name
USB_CALIB
USB_CALIB_EXT fuse (Address 0x03820350)
USB_CALIB_EXT
USB_CALIB_EXT
USB_CALIB_EXT
USB_CALIB_EXT
During the characterization stage, adjusting the HS_CURR_LEVEL value by modifying the USB
register listed in Table 2 directly should be enough to fulfill compliance requirements. It is
possible to try to increase termination as a last resort.
Note: Although it is possible to try to increase termination as a last resort, NVIDIA does not
recommend adjusting termination values. NVIDIA cautions that if the TERM_RANGE_ADJ is
adjusted, it may result in an impedance mismatch on the board and further attention might be
needed.
Once the characterization stage has completed, if modification to HS_CURR_LEVEL is
necessary, it must be done as an offset to the default fused value to account for silicon
process differences.
!
CAUTION: Do not apply a global overwrite HS_CURR_LEVEL value for all silicon. Software should
read the fuse USB drive strength and add an offset to it.
All other settings can be modified directly:
To change high-speed slew rate, write directly to:
XUSB_PADCTL_USB2_OTG_PADx_CTL_0_0 bits 8:6
To change receive squelch level, write directly to:
XUSB_PADCTL_USB2_BIAS_PAD_CTL_0_0 bits 2:0
To compensate for long cable loss, use the XUSB_PADCTL_USB2_OTG_PADx_CTL_3_0
HS_TXEQ/HS_RXEQ bits directly.
HS_CURR_LEVEL Offset Adjustment Procedure
If the default values are not suitable to the customer design, adjust the HS_CURR_LEVEL
register to pass the USB HS eye diagram.
Follow this procedure:
Adjust the HS_CURR_LEVEL register as described in the "Tuning Procedure and
1.
Registers" section to pass the USB HS eye diagram.
Obtain default value; read USB_CALIB fuse (Address 0x038201F0).
2.
USB_CALIB[5:0] USB pad HS_CURR_LEVEL[5:0] for Port 0
PRELIMINARY INFORMATION
Jetson AGX Orin Series Tuning and Compliance Guide
Bit Field
Description
5:0
HS_CURR_LEVEL for USB Port 0
16:13
USB pad TERM_RANGE_ADJ[3:0], for port 3
12:9
USB pad TERM_RANGE_ADJ[3:0], for port 2
8:5
USB pad TERM_RANGE_ADJ[3:0], for port 1
4:0
USB pad RPD_CTL[4:0], share for all ports
USB 2.0 Tuning Guide
DA-11040-001_v0.7 | 5
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