Celeron Processor; Figure 3-2. Celeron Processor; Table 3-1. Celeron Processor - HP Deskpro EX Technical Reference Manual

Chapter 3 Processor/Memory Subsystem
3.2 PROCESSOR
The Compaq Deskpro EX is shipped with either a Celeron or Pentium III processor.

3.2.1 CELERON PROCESSOR

The Celeron processor (Figure 3-2) uses a dual-ALU CPU with branch prediction and MMX
support, floating point unit (FPU) for math coprocessing, a 32-KB primary (L1) cache, and a 128-
KB secondary (L2) ECC cache. All internal functions operate at processor speed while the front
side bus interface (FSB I/F), operates at a clock speed of 66 MHz.
Core processing speed
Figure 3–2. Celeron Processor Internal Architecture
The Celeron processor is software-compatible with earlier generation Pentium II, Pentium MMX,
Pentium, and x86 processors. The MMX support provided by the Celeron consists of 57 special
instructions for accelerating multimedia communications applications. Such applications often
involve computing-intensive loops that can take up as much as 90 percent of the CPU's execution
time. Using a parallel-processing technique called single-instruction multiple-data (SIMD), MMX
logic processes data 64 bits at a time. Specific applications that can benefit from MMX technology
include 2D/3D graphics, audio, speech recognition, video codecs, and data compression. Celeron
processors operating at 566 MHz and faster also include Streaming SIMD Extension (SSE)
support discussed in more detail in the Pentium III subsection.
These systems support the Celeron processors listed in the following table:
Table 3–1. Celeron Processor Statistical Comparison
Celeron Processor Statistical Comparison
Processor
Celeron 533/66A
Celeron 566/66
Celeron 600/66 [1]
Celeron 633/66
Celeron 667/66
Celeron 700/66
NOTE:
[1] Standard configuration processor
3-2 Compaq Deskpro EX Series of Personal Computers
Celeron Processor
FPU 32-KB
CPU
Cache
FSB
I/F
FSB speed
Table 3-1.
Core/L1/L2 FSB
Speed Speed
533 MHz 66 MHz
566 MHz 66 MHz
600 MHz 66 MHz
633 MHz 66 MHz
667 MHz 66 MHz
700 MHz 66 MHz
First Edition - August 2000
128-KB
L1 L2
Cache
Core
Voltage
2.0 v
2.0 v
2.0 v
2.0 v
2.0 v
2.0 v