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X10DRFR/X10DRFR-N/X10DRFR-NT Motherboard User's Manual
TPM Header/Port 80
A Trusted Platform Module/Port 80 head-
er is located at JTPM1 to provide TPM
support and Port 80 connection. Use this
header to enhance system performance
and data security. See the table on the
right for pin definitions.
Non-Mask Interrupt Header
A Non-Mask Interrupt header is located at
JNMI1 to provide NMI1 connection. Use
this header to enhance system. See the
layout for the location.
IPMI_LAN
LAN2 LAN1
BMC
JWD1
I-SATA3
JNMI1
LE2
PCH
CPU1
CLOSE 1st
OPEN 1st
BAR CODE
JPP0
X10DRFR
JITP1
JPP1
Rev. 1.10
1
CPU2
VGA
JIPMB1
LE3
JPL1
1
FAN4
LAN
CTRL
B
A
Battery
JBAT1
GND
12V_IN
JF1
HDDPOWER1
HDDPOWER2
HDDPOWER3
JNVME2JNVME1
POWER BUTTON
2-22
TPM/Port 80 Header
Pin Definitions
Pin #
Definition
Pin #
1
LCLK
2
3
LFRAME#
4
5
LRESET#
6
7
LAD 3
8
9
+3.3V
10
11
LAD0
12
13
SMB_CLK4
14
15
+3V_DUAL
16
17
GND
18
19
LPCPD#
20
NMI Button
Pin Definitions
Pin#
Definition
1
Control
2
Ground
A. TPM/Port80
B. JNMI1
Definition
GND
<(KEY)>
+5V (X)
LAD 2
LAD1
GND
SMB_DAT4
SERIRQ
CLKRUN# (X)
LDRQ# (X)
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