Pioneer VSX-AX5Ai-S Service Manual page 159

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No. Pin Name I/O
121 MCIF_ADDR2 I
122 MCIF_ADDR3 I
123 MCIF_ADDR4 I
124 MCIF_ADDR5 I
125 MCIF_ADDR6 I
126 MCIF_ADDR7 I
127 MCIF_ADDR8 I
128 MCIF_ADDR9 I
129 MCIF_ADDR10 I
98 MCIF_BUSCLKz I
90 MCIF_CS_IOz I
91 MCIF_CS_MEMz I
99 MCIF_DATA0 I/O
100 MCIF_DATA1 I/O
103 MCIF_DATA2 I/O
104 MCIF_DATA3 I/O
105 MCIF_DATA4 I/O
106 MCIF_DATA5 I/O
107 MCIF_DATA6 I/O
108 MCIF_DATA7 I/O
109 MCIF_DATA8 I/O
110 MCIF_DATA9 I/O
111 MCIF_DATA10 I/O
112 MCIF_DATA11 I/O
113 MCIF_DATA12 I/O
114 MCIF_DATA13 I/O
118 MCIF_DATA14 I/O
119 MCIF_DATA15 I/O
132 MCIF_ENDIAN I
89 MCIF_INTz O
133 MCIF_MODE0 I
134 MCIF_MODE1 I
135 MCIF_MODE2 I
96 MCIF_OEz I
92 MCIF_R_nWz I
93 MCIF_STRBz I
94 MCIF_WAITz O
97 MCIF_WEz I
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MCIF address 2 pin
MCIF address 3 pin
MCIF address 4 pin
MCIF address 5 pin
MCIF address 6 pin
MCIF address 7 pin
MCIF address 8 pin
MCIF address 9 pin
MCIF address 10 pin. This data pin is the most significant bit of the MCIF address bus.
MCIF bus clock. This pin is only used for the MCIF synchronous mode. I/O Type-3 MPC850 and the
memory access. This signal must be pulled high if not used.
MCIF chip select for all I/O MCIF modes.
MCIF chip select for the memory MCIF mode.
MCIF data 0 pin. This data pin is the least significant bit of the MCIF data bus.
MCIF data 1 pin.
MCIF data 2 pin.
MCIF data 3 pin.
MCIF data 4 pin.
MCIF data 5 pin.
MCIF data 6 pin.
MCIF data 7 pin.
MCIF data 8 pin.
MCIF data 9 pin.
MCIF data 10 pin.
MCIF data 11 pin.
MCIF data 12 pin.
MCIF data 13 pin.
MCIF data 14 pin.
MCIF data 15 pin. This data pin is the most significant bit of the MCIF data bus.
MCIF endian pin. This sets the endianness for accesses between the external CPU and the internal
iceLynx-Micro memory. This pin sets endianness for all MCIF modes. When set to 0, data is read/written to
the ex-CPU exactly as it is stored in iceLynx-Micro memory. (Big endian)
When set to 1, data is swapped on half-word and byte boundaries before it is read/written to the ex-CPU.
(Little endian)
MCIF Interrupt. This signal is push-pull (always asserted). It does not require a pull-up resistor.
MCIF mode 0. Used to select MCIF mode.
MCIF mode 1. Used to select MCIF mode.
MCIF mode 2. Used to select MCIF mode.
MCIF output enable. Default active low. This input pin indicates if the system CPU wants to perform a
MCIF read access. This signal is used for the following modes:
• SH-3 I/O access • M16C/62 I/O access
This signal must be pulled high if not used.
MCIF read/write pin. Default value for a read is 1. Default value for a write is 0.
MCIF strobe pin. Default active low. This pin is used (along with MCIF_CS_IOz) to validate the MCIF
access. This signal is used for the following modes:
• 68000 + wait I/O access • MPC850 I/O access
When not used, this pin must be pulled high.
MCIF wait pin. Default active high. iceLynx-Micro asserts this signal if it is not ready to service an MCIF
request. When not asserted, this signal is in a high-Z state. This signal is used for the following modes:
• 68000 + wait I/O access • SH-3 I/O access • M16C/62 I/O access
MCIF Write Enable. Default active low. This input pin indicates if the system CPU wants to perform a MCIF
write access. This signal is used for the following modes:
• SH-3 I/O access • M16C/62 I/O access
This signal must be pulled high if not used.
VSX-AX5Ai-S
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7
Pin Function
• Memory access
• Memory access
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8
A
B
C
D
E
F
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