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Features and Electrical Performance
1.2
Configuration Points
Table 2
indicates the available test points and configuration jumpers. These points offer flexibility in
configuring the evaluation module and include but are not limited to;
•
BIAS pin to be connected to:
– External supply (VAUX)
– Input voltage (VIN)
– Regulated output voltage (VOUT)
– VCC pin
•
PGOOD pin to be supplied by either VCC or VAUX
•
External clock synchronization
•
Shut-down signal by pulling the UVLO pin low.
Jumper
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
Pin 1 to pin 2
J6
Pin 2 to pin 3
Pin 1 to pin 2
J7
Pin 2 to pin 3
J8
Pin 1 to pin 2
J9
Pin 1 to pin 2
Pin 1 to Pin 2
J10
Pin 2 to Pin 3
VCC (Pin 1)
BIAS-IC (Pin 2)
PGOOD (Pin 3)
J11
COMP (Pin 4)
UVLO (Pin 6)
AGND (Pin 7)
4
LM5156EVM-BST User's Guide
Table 2. Jumper Description
Pin
VIN
Positive input voltage sense connection
SW
Probe point for the switch node of the LM5156 boost circuit
VOUT
Positive output voltage sense connection
VIN-
Negative input voltage sense connection
GND
Negative output voltage sense connection
Supply VCC from and external supply. Note VCCext must be less than the voltage on the
VCCext
BIAS pin.
VAUX
Supply the BIAS pin from and external supply. R12 also connect to this rail
VOUT+
Loop response positive injection point
VOUT-
Loop response negative injection point
SYNC
Input for external clock synchronization
SD
High signal pulls UVLO pin to ground entering shutdown mode
Connect VOUT to the BIAS pin of the LM5156 through D3
Directly connect VOUT to BIAS pin of the LM5156
Connect VIN to the BIAS pin of the LM5156 through D4
Directly connect VIN to BIAS pin of the LM5156
Directly Connect VCC to the BIAS pin
Directly connect VAUX to the BIAS pin
Disable spread spectrum
Enable spread spectrum
Monitor the VCC pin
Monitor the BIAS pin
Monitor the PGOOD pin
Monitor the COMP pin
SS (Pin 5)
Monitor the SS pin
Monitor the UVLO pin
Connection to AGND plan
Copyright © 2020, Texas Instruments Incorporated
Description
SNVU696A – February 2020 – Revised June 2020
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