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14.9. IC502 (MN101C49KCB1) SYSTEM MICROPROCESSOR
Pin No.
Mark
1
VREF-
2
KEY1
3
KEY2
4
MK_IN1
5
MK_IN2
6
DCDET
7
DES
8
VOL JOG1
9
VOL JOG2
10
VREF+
11
VDD
12
OSC2
13
OSC1
14
VSS
15
XI
16
XO
17
MMOD
18
PMD_OUT
19
PMD_IN
20
RDS_CLK
21
NC
22
CD_SUBQ
23
CD_SQCK
24
NC
25
PCONT2
I/O
Function
— Connected to GND
I
Key 1 input terminal
I
Key 2 input terminal
I
Mechanism condition 1
input terminal (HALF/
RECI_F/ RECI_R/MODE)
I
Mechanism condition 2
input terminal (PHOTO/
TPS)
I
Power supply detect
input terminal
I
Destination switch
input terminal
I
Jog 1 input terminal
I
Jog 2 input terminal
I
Power supply
connection terminal
I
Power supply input
terminal
O Main lock signal output
terminal (F=8MHz)
I
Main lock signal input
terminal (F=8MHz)
— GND terminal
I
Sub clock input
terminal (F=32MHz)
O Sub clock output
terminal (F=32MHz)
— GND terminal
O P-MD data output
terminal
I
P-MD data input
terminal
I
RDS clock input
terminal
— Not used/Open
I
CD sub-code input
terminal
O CD sub-code read
clock output terminal
— Not used/Open
O Power supply control 2
output terminal
82
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