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IC DESCRIPTION
Pin 35, VERT Vertical Sawtooth Output (Fig. 6–20)
This pin supplies the drive signal for the vertical output
stage. The drive signal is generated with 15-bit preci-
sion. The analog voltage is generated by a 4 bit cur-
rent-DAC with external resistor and uses digital noise
shaping.
Pin 36, EW East-West Parabola Output (Fig. 6–21)
This pin supplies the parabola signal for the East-West
correction. The drive signal is generated with 15 bit
precision. The analog voltage is generated by a 4 bit
current-DAC with external resistor and uses digital
noise shaping.
Pin 37, SENSE Measurement ADC Input (Fig. 6–23)
This is the input of the analog to digital converter for the
picture and tube measurement. Three measurement
ranges are selectable with RSW1 and RSW2.
Pin 38, GNDM Measurement ADC Reference Input
This is the ground reference for the measurement A/D
converter. Connect this pin to GND
Pin 39, 40, RSW1, RSW2 Range Switch for Measur-
ing ADC (Fig. 6–22)
These pins are open drain pull-down outputs. RSW1 is
switched off during cutoff and whitedrive measure-
ment. RSW2 is switched off during cutoff measurement
only.
Pin 41, SVMOUT Scan Velocity Modulation Output
(Fig. 6–15)
This output delivers the analog SVM signal. The D/A
converter is a current sink like the RGB D/A convert-
ers. At zero signal the output current is 50% of the
maximum output current.
Pin 42, 43, 44, ROUT, GOUT, BOUT Analog RGB
Output (Fig. 6–15)
These pins are the analog Red/Green/Blue outputs of
the back-end. The outputs are current sinks.
Pin 45, VSUPAB* Supply Voltage, Analog Back-end
This pin has to be connected to the analog supply volt-
age. No supply current for the digital stages should flow
through this line.
Pin 46, GNDAB* Ground, Analog Back-end
This pin has to be connected to the analog ground. No
supply current for the digital stages should flow through
this line.
Pin 47, VRD DAC Reference Decoupling (Fig. 6–24)
Via this pin the DAC reference voltage is decoupled by
an external capacitor. The DAC output currents depend
on this voltage, therefore a pull-down transistor can be
used to shut off all beam currents. A decoupling
capacitor of 4.7 F in parallel to 100 nF (low inductance)
is required.
All manuals and user guides at all-guides.com
-31-
Pin 48, XREF DAC Current Reference (Fig. 6–24)
External reference resistor for DAC output currents,
typical 10 k ߟ to adjust the output current of the D/A
converters. (see recommended operating conditions).
This resistor has to be connected to analog ground as
closely as possible to the pin.
Pin 49, 50, 51, AIN13 Analog Audio Input (Fig. 6–25)
The analog input signal from TUNER or SCART is fed
to this pin. The input signal must be AC-coupled. Alter-
natively these pins can be used as digital input port
(Fig. 6–25).
Pin 52, 53, AOUT1, AOUT2 Analog Audio Output (Fig.
6–26)
These pins are the analog audio outputs. Connections
to these pins must use a 680 ohm series resistor as
closely as possible to these pins. The output signals are
intended to be AC coupled. Alternatively these pins can
be used as digital input port (Fig. 6–26).
Pin 54, VSUPS* Supply Voltage, Standby
Pin 55, GNDS* Ground, Standby
This is the ground reference for the standby circuitry.
Pins 56 and 57, XTAL1 Crystal Input and XTAL2 Crys-
tal Output (Fig. 6–7)
These pins are connected to an 20.25 MHz crystal
oscillator which is digitally tuned by integrated shunt
capacitances. The CLK20 clock signal is derived from
this oscillator.
Pin 58, RESQ Reset Input/Output (Fig. 6–6)
A low level on this pin resets the VCT 38xxA/B. The
internal CPU can pull down this pin to reset external
devices connected to this pin.
2
Pin 59, SCL I
C Bus Clock (Fig. 6–6)
This pin connects to the I2C bus clock line. The signal
can be pulled down by external slave ICs to slow down
data transfer.
2
Pin 60, SDA I
C Bus Data (Fig. 6–6)
This pin connects to the I2C bus data line.
Pin 6164, P20P23 I/O Port (Fig. 6–27)
These pins provide CPU controlled I/O ports.
VCT 38xxA/B
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