JVC XV-C3SL Service Manual page 45

• Pin function (ZIVA-4.1-PB0 : 2/5)
Pin No. Symbol
37 VSS
38 NC
39 NC
40 NC
41 NC
42 NC
43 PIO0
44 VSS
45 VDD_3.3
46 PIO1
47 PIO2
48 PIO3
49 PIO4
50 PIO5
51 PIO6
52 PIO7
53 MDATA0
54 MDATA1
55 VDD_3.3
56 VSS
57 MDATA2
58 MDATA3
59 MDATA4
60 MDATA5
61 MDATA6
62 MDATA7
63 MDATA15
64 VDD_3.3
65 VSS
66 MDATA14
67 VDD_2.5
68 VSS
69 MDATA13
70 MDATA12
71 MDATA11
72 MDATA10
73 MDATA9
74 VDD_3.3
75 VSS
76 MDATA8
77 LDQM
78 SD-CLK
79 CLKSEL
80 MADDR9
81 MADDR8
82 VDD_3.3
83 VSS
84 MADDR7
I/O
- Connect to ground
- Non connect
- Non connect
- Non connect
- Non connect
- Non connect
I/O Programmable I/O terminal
- Connect to ground
- Power supply terminal 3.3V
I/O Programmable I/O terminal
I/O Programmable I/O terminal
I/O Programmable I/O terminal
I/O Programmable I/O terminal
I/O Programmable I/O terminal
I/O Programmable I/O terminal
I/O Programmable I/O terminal
I/O SDRAM data
I/O SDRAM data
- Power supply terminal 3.3V
- Connect to ground
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
- Power supply terminal 3.3V
- Connect to ground
I/O SDRAM data
- Power supply terminal 2.5
- Connect to ground
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
I/O SDRAM data
- Power supply terminal 3.3V
- Connect to ground
I/O SDRAM data
O SDRAM Lower or upper mask
O SDRAM Clock
I Selects SYSCLK or VCLK as clock source. Normal operation is to tie HIGH.
O SDRAM address
O SDRAM address
- Power supply terminal 3.3V
- Connect to ground
O SDRAM address
Description
XV-C3SL
45