LG 42PQ20 Training Manual page 74

Z - SUS Board Layout
Z - SUS Board Layout
No IPMs
Z SUS
Waveform
Development
ICs
VS Input from
the Y-SUS
P3
P2
Logic Signals from the Control PWB
Also +15V and +5V
Read the Label on the back of the
upper left hand side of the panel.
Z-Bias ADJ VR8
74
Z SUS
Waveform
Test Point
J27
Z SUS
Output
ICs
VZ (Z-Bias) TP
Right side
R49 or R50
January 2009 Plasma
Z Bias
P6
FPC
P7
FPC
42PQ20