Adc Amplifier Drive; Figure 2-2. Amplifier Drive Circuit - Texas Instruments ADS8568EVM-PDK User Manual

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EVM Analog Interface

2.2 ADC Amplifier Drive

Figure 2-2
shows the op amp configuration for each ADC drive input. The default configuration is and inverting
configuration. This can be converted to a non-inverting configuration but uninstalling R6, and R14, and installing
R11. Also, R11 and C11 can be used to create a low pass filter. The jumper JP1 can be used to completely
bypass the amplifier. This diagram only shows one channel but this circuit is repeated 8 times. For other
channels, see
Appendix
A.
J1
A0I
1
A0
GND
6
ADS8568EVM-PDK Evaluation Module
R3
0
DNP
GND
R6
1.00k
R11
0
R12
0
DNP
R14
C11
DNP
0
100nF
GND
GND
HVSS
HVDD
J9

Figure 2-2. Amplifier Drive Circuit

Copyright © 2021 Texas Instruments Incorporated
C4
39pF
R4
1.00k
HVDD
Bypass
2
U1A
1
3
OPA2211AIDDA
HVSS
HVDD
C1
100nF
50V
C5
1uF
35V
C7
100nF
50V
GND
HVSS
SBAU193E – JUNE 2011 – REVISED MAY 2021
www.ti.com
JP1
w/Amp
R8
10.0
A0
C12
2200pF
GND
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