Digital Baseband - LG L240 Service Manual

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3. Circuit Description

3.3 Digital Baseband

OMAPV1030 EDGE multimedia platform
Test:
E2TLM, BCM, SCM,DielD
JTAG, FuseFarm
MPU private peripherals
Timers (x3)
WD timers
System DMA handler
MPU level 2 INTH
Secure watchdog
32k watchdog
OMAPV1030 config.
DES/3DES
SHA1/MDS5
AES
PKA
LCDCONV
RNG
3.3.1 General description
The OMAPV1030 E-GPRS multimedia device belongs to the Texas Instruments OMAP-Vox_
processors family. It combines both a modem engine and an application engine. Memory and CPU
resources are shared between modem and application processing.
The OMAPV1030 chip is based on the OMAP3.4 architecture and integrates two processor
subsystems:
- An MPU subsystem based on an ARM926EJ-S
- A DSP subsystem based on a UMA 2.6 architecture integrating a C55x DSP core
The OMAPV1030's silicon process technology is a c027.0 90-nm digital CMOS.
USB controller
Host
Device
OTG
OCP-I
OCP-T2
subsystem
LCD
controller
TIPB bridge (x2)
MPU/DSP shared peripherals
MPU public peripherals
TIPB static switches
uWire
ULPDR
HDQ/1-Wire
CIPHER A5
MMC/SDIO1
TPU
Keyboard controller
TSP
Memory stick
GEA 1/2/3
USIM
OMAPV1030 OS timer
MCSI (x2)
LPG (x2)
PWT
<Fig.6> OMAPV1030 Block Diagram
- 20 -
SDRAM Flash and
SRAM
OCP-T1
EMIFF
EMIFS
Traffic controller
MPU
System
DMA
controller
Dynamic switches
OCP static switches
GP timer (x2)
32k Sync timer
Serial radio IF
Frame counter
McBSP1
GPIO (x2)
McBSP RF
MMC/SDIO2
Nand flash ctrl
Static switches
SPI
UART (x3)
APLL
2
I C(x2)
Boot ROM
Secure eFuse
Secure RAM
Security layer
DSP MMU
DSP
subsystem
DSP private
peripherals
Timers (x3)
WD timer
DSP DMA handler
DSP interrupt
handler
ULPDR

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