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7. CIRCUIT DIAGRAM
1
2
FDATA(15:0)
E14
FDATA(0)
ADQ0
E13
FDATA(1)
ADQ1
F14
FDATA(2)
ADQ2
F13
FDATA(3)
ADQ3
H14
FDATA(4)
ADQ4
J14
FDATA(5)
ADQ5
K14
FDATA(6)
ADQ6
K13
FDATA(7)
ADQ7
D13
FDATA(8)
ADQ8
E12
FDATA(9)
ADQ9
G14
FDATA(10)
ADQ10
G13
FDATA(11)
ADQ11
H13
FDATA(12)
ADQ12
H12
FDATA(13)
ADQ13
L14
FDATA(14)
FADD(24:17)
ADQ14
L13
FDATA(15)
ADQ15
J1
FADD(17)
A16
B
E3
FADD(18)
A17
F3
FADD(19)
A18
F2
FADD(20)
A19
L1
FADD(21)
A20
K1
FADD(22)
A21
E2
FADD(23)
A22
F1
FADD(24)
A23
SADD(12:0)
P10
SADD(0)
D_A0
M10
SADD(1)
D_A1
N10
SADD(2)
D_A2
S72NS512NE0ZJW730
M3
SADD(3)
D_A3
(RRD256256256MMG)
P4
SADD(4)
D_A4
N4
SADD(5)
D_A5
M4
SADD(6)
D_A6
P5
SADD(7)
D_A7
N5
SADD(8)
D_A8
M5
SADD(9)
D_A9
M9
SADD(10)
D_A10
N9
SADD(11)
D_A11
N11
SADD(12)
D_A12
C
G3
NFWE
_F_WE
D12
NFOE
_F_OE
G2
NFWP
_F_WP
L2
NFRP
_F_RST
TP206
G1
NFCS_3
_F1_CE
R206
0
M12
NFCS_1
_F2_CE
K2
NFADV
_F_AVD
H3
FCLK
F_CLK
M13
FRDY
F_RDY
M8
NSWE
_D_WE
L3
SD_CS
_D_CE
N6
NSCAS
_D_CAS
P6
NSRAS
_D_RAS
M6
SDCLK_EN
D_CKE
N7
SDCLKX
_D_CLK
P7
SDCLK
D_CLK
P9
SBANK0
D_BA0
N8
SBANK1
D_BA1
C11
DQSL
D_LDQS
B4
DQSH
D_UDQS
B9
NSDQML
D_LDQM
D
C6
NSDQMU
D_UDQM
A2
D_TEST
R220
0
DPD0
R221
0
DPD1
U203
R220
R221
Spansion
NA
NA
Samsung
0 ohm
0 ohm
E
1
2
3
4
5
Memory
SDATA(15:0)
C13
SDATA(0)
D_DQ0
B12
SDATA(1)
D_DQ1
C12
D_DQ2
SDATA(2)
A11
SDATA(3)
D_DQ3
B11
SDATA(4)
D_DQ4
A10
D_DQ5
SDATA(5)
B10
SDATA(6)
D_DQ6
C10
D_DQ7
SDATA(7)
A6
SDATA(8)
D_DQ8
A5
SDATA(9)
D_DQ9
B5
D_DQ10
SDATA(10)
C5
SDATA(11)
D_DQ11
C4
SDATA(12)
D_DQ12
B3
D_DQ13
SDATA(13)
C3
SDATA(14)
D_DQ14
C2
SDATA(15)
D_DQ15
M2
VRMEM
NC7
P3
NC9
D4
R207
INDEX
0
H2
VRMEM
F_VCC1
N13
U203
F_VCC2
C202
C203
G12
F_VCCQ1
0.1u
1u
L12
R208
F_VCCQ2
R209
47K
0
H1
R217
NA
F_VPP
A8
D_VCC1
A9
D_VCC2
C1
C204
C205
D_VCC3
C8
D_VCC4
0.1u
1u
D14
D_VCC5
N3
D_VCC6
P8
D_VCC7
P11
D_VCC8
A4
D_VCCQ1
B7
D_VCCQ2
B8
D_VCCQ3
B13
D_VCCQ4
F12
F_VSS1
J2
F_VSS2
J12
F_VSS3
J13
F_VSS4
M14
F_VSS5
A7
D_VSS1
B2
D_VSS2
C7
D_VSS3
C14
D_VSS4
M7
D_VSS5
N2
D_VSS6
P12
D_VSS7
A3
D_VSSQ1
A12
D_VSSQ2
B6
D_VSSQ3
C9
D_VSSQ4
3
4
5
- 100 -
6
7
Transflash Connector
VRMMC
TF_DAT2
TF_DAT3
TF_CMD
C201
C214
1u
0.1u
SIM CONNECTOR
VRSIM
SIM_RST
R218
24
SIM_CLK
C206
C207
150p
150p
Section
Designer
Checked
Approved
Iss.
Notice No.
Date
Name
LG Electronics Inc.
8
9
10
S201
SCHB1A0202
1
8
DAT2
DAT1
TF_DAT1
2
7
DAT3
DAT0
TF_DAT0
3
6
CMD
VSS
4
5
VDD
CLK
TF_CLK
9
11
GND1
GND3
10
12
GND2
GND4
ENSY0017701
R211
10K
1
4
VCC
GND
SIM_PWRCTRL
2
5
RST
VPP
3
6
CLK
I_O
SIM_IO
J201
1-1705300-6
C209
R219
C208
0.1u
NA
22p
Date
Sign & Name
MODEL
LG240
06/30
JM KIM
2006
DRAWING
MEMORY / T-FLASH / SIM / LDO
NAME
DRAWING
Rev 1.1
NO.
A
B
C
D
Sheet/
Sheets
2/7
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