Xilinx Virtex-6 FPGA ML605 Getting Started page 34

Getting Started with PCI Express PIO Demonstration
14. Navigate to the linked list in the configuration space (as shown in
15. With the Xilinx device selected, select register 0x40.
X-Ref Target - Figure 1-33
34
the PCIe capabilities structure.
♦
Register 0x40 points to the next structure
♦
0x48 is the address of the next structure
Figure 1-33: Locate the PCIe Capabilities Structure
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Figure 1-33) to locate
Virtex-6 Getting Started Guide
UG533 (v1.4) November 15, 2010