Xilinx Virtex-6 FPGA ML605 Getting Started page 30

Getting Started with PCI Express PIO Demonstration
Hardware Requirement
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Hardware Installation and Setup
All jumpers on the ML605 should remain set to the factory default. As viewed from left-to-
right in
Flash XL device using Slave SelectMAP and the onboard external oscillator for CCLK. J42
should also have a shunt on pins 5 and 6 for x8 PCI Express configuration.
6.
7.
8.
X-Ref Target - Figure 1-29
30
PC with Gen 1 x8 or x16 PCI Express slot fully dedicated for add-on end-point PCIe
card (the slot should not be dedicated to graphic cards only)
ML605 board
Figure 1-29, S2 is set to 011001. This will configure the FPGA from the Platform
Ensure Configuration Mode Switch S2 is set to 011001 (position 6 to position 1)
Insert your ML605 board into a PCIe x8 slot (x16 as shown in
Connect your PC power to J25 and turn on the power switch.
Caution!
Do not use the PCIe power connector from the PC power supply. Use only the 4-pin
ATX connector.
Figure 1-29: Board Insertion Location
www.xilinx.com
Figure 1-29).
UG533_c1_29_060110
Virtex-6 Getting Started Guide
UG533 (v1.4) November 15, 2010