Xilinx System Generator V2.1 Reference Manual page 94

Xilinx System Generator v2.1 Reference Guide
fundamental sinusoid lie in the half-open interval [-1, 1]. If you need a balanced
representation, one can be built using the Single Port RAM block with the appropriate
initialization vector.
Block Parameters Dialog Box
The block parameters dialog box can be invoked by double-clicking the icon in your
Simulink model.
Figure 3-65: SineCosine block parameters dialog box
Parameters specific to the SineCosine block are:
Other parameters used by this block are described in the Common Parameters section
of the previous chapter.
Xilinx LogiCORE
The block always uses the Xilinx LogiCORE Sine/Cosine Look-Up Table V3.0. The
input and output width determine whether the ROM stores a full or quarter wave.
The distributed memory case stores a full wave for table depths less than or equal to
94
Function: specifies output to be sine, cosine, or both.
Negative Sine: when selected, the sine output is negated.
Negative Cosine: when selected, the cosine output is negated.
Output Width: specifies the number of bits in the output. The valid range is
from 4 to 32, inclusive. The output is stored as a two's complement value with one
integer sign bit. As a result, the range of values stored in the table lies in the half-
open interval [-1, 1].
Memory Type: directs the block to be implemented either with Distributed or
Block RAM.
Pipeline the Core: when selected, the implementation is fully pipelined.
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