Pga112_Test_Board Block Diagram - Texas Instruments PGA112 User Manual

Evaluation module
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2.1
Theory of Operation for PGA112_Test_Board Hardware
Figure 3
presents a block diagram of the PGA112_Test_Board. The functionality of this PCB is relatively
simple. It provides connections to the I
Platform board. It also provides connection points for external connections of the shunt voltage, bus
voltage, and GND.
See
Figure 4
for an illustration of the PGA112_Test_Board schematic. The J1 connector ports the
analog-to-digital converters (ADCs), digital-to analog converters (DACs), and SPI™ control. The J2
connector ports the control bits for the input and output switches.
SBOU073 – February 2009
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2
C™ and general-purpose input/outputs (GPIO) on the USB DAQ
V
Switched 5.0V Power
25-Pin
Male DSUB Signals
From USB DAQ Platform
Analog DAC settings
·
for the inputs
Analog-to-digital
·
inputs for precision
measurements
25-Pin
Female DSUB Signals
From USB DAQ Platform
·
·
·
Figure 3. PGA112_Test_Board Block Diagram
Connection to
Supply
DUT
Optional External
Source
External SPI
PGA112/
PGA113
General-Purpose Digital I/O
SPI Communication
MUX Logic Control
System Setup
Optional
Address
Jumpers
PGA112 Evaluation Module
5

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