Connecting PFI Input Signals
All PFI I/O lines are referenced to PFI GND.
PFI Filters
The PXIe-4309 has programmable debouncing filters on each PFI, PXI_Trig, PXI_STAR, or
PXI_DSTAR. When filters are enabled, the PXIe-4309 uses the onboard oscillator as the filter
clock to sample the filter input on each rising edge and to generate the filtered digital signal.
Enabling filters introduces jitter on the input signal. The maximum jitter is
Note
one period of the filter clock.
Figure 2-14 shows an example of a low-to-high transition for a custom filter with N set to 5.
Figure 2-14. Low-to-High Transition for a Custom Filter with N Set to 5
Filter Input
Filter Clock
Filtered Digital Signal
Table 2-9 shows the debouncing filters supported by the PXIe-4309.
Filter Setting
None
90 ns
(short)
5.12 µs
(medium)
Custom
The filter setting for each input can be configured independently. Filters are disabled on
power up.
1
1
2
Table 2-9. Debouncing Filters
Filter Clock
Pass Signal)
—
100 MHz
100 MHz
100 MHz
3
4
1
2
3
N (Filter
Clocks
Pulse Width
Needed to
Guaranteed
to Pass Filter
—
9
512
N
PXIe-4309 User Manual
Filtered input goes
high when terminal
4
5
is sampled high on
five consecutive filter
clocks.
Pulse Width
Guaranteed
to Not Pass
—
90 ns
5.12 µs
5.11 µs
N
----------------------
----------------------
100 MHz
100 MHz
© National Instruments | 2-19
Filter
—
80 ns
(N - 1)